1. how to choose PCB plate?

The selection of PCB materials must balance the design requirements with the mass productivity and cost

Design requirements include both electrical and institutional parts

This material problem is usually more important when designing very high-speed PCBs (greater than GHz).

For example, in the commonly used FR-4 materials, the dielectric loss at a frequency of several GHz has a great influence on the signal attenuation and may not be applicable.

In electrical terms, it should be noted whether the dielectric constant and the dielectric loss are used together at the designed frequency.

 

2.How to avoid high-frequency interference?

The basic idea of avoiding high-frequency interference is to minimize the electromagnetic field interference of high-frequency signals, which is known as crosstalk (Crosstalk).

The distance between the high-speed signal and the analog signal can be increased, or ground guard/shunt traces can be added next to the analog signal.

Also, pay attention to digital noise interference on the analog ground

3. How to solve the problem of signal integrity in high-speed design?

Signal integrity is basically a problem of impedance matching

The factors affecting the impedance matching are the signal source’s architecture and output impedance, the characteristic impedance of the trace, the characteristics of the load, the topology of the trace, etc.

The solution is to rely on termination and adjustment of the routing topology

 

4. How is the differential wiring method implemented?

There are two points to pay attention to the wiring of the differential pair. First, the length of the two lines must be as long as possible. The other is that the spacing between the two lines (which is determined by the differential impedance) must remain constant, that is, it must be kept parallel.

There are two types of parallelism. One is a two-line walk on the same side-by-side, and one is a two-line walk on the two adjacent layers (over-under).

Generally, the former has a more side-by-side approach

 

5. for only one output of the clock signal line, how to achieve differential wiring?

To use differential wiring must be a signal source and the receiver is also a differential signal only meaningful

Therefore, it is not possible to use differential wiring for clock signals with only one output.

 

6. Can a matching resistor be added between the receiver differential line pairs?

The matching resistance between the differential pairs at the receiving end is usually increased and its value should be equal to the value of the differential impedance.

This signal quality will be better

 

7. Why are the differential pair wiring close and parallel?

The wiring of differential pairs should be close to and parallel

The so-called proper proximity is because this spacing affects the value of the differential impedance, which is an important parameter for designing a differential pair.

Need to be parallel also because of the need to maintain the consistency of the differential impedance

If the two lines are suddenly missed, the differential impedance will be inconsistent, affecting the signal integrity and timing delay.

 

8.How to deal with some theoretical conflicts the n actual wiring

1. Basically, it is right to isolate the analog/digital ground

It should be noted that the signal traces should not cross over the moat, and do not make the return current path of the power supply and the signal too large.

  1. The crystal oscillator is an analog positive feedback oscillator circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. The oscillation specification of the analog signal is easily disturbed. Even adding ground guard traces may not completely isolate the interference.

And too far away, noise on the ground plane will also affect the positive feedback oscillation circuit

Therefore, it is important to keep the distance between the crystal and the chip closer.

  1. There is a lot of conflict between high-speed cabling and EMI requirements

However, the basic principle is that because of the EMI resistance capacitors or ferrite bead, some electrical characteristics of the signal cannot be out of specification.

Therefore, it is better to solve or reduce the EMI problem by arranging the routing and PCB stacking techniques first, such as high-speed signal routing

Finally, use resistors and capacitors or ferrite bead to reduce signal damage

 

9. How to solve the contradiction between the high-speed signal manual wiring and automatic wiring?

Nowadays, most of the auto routers of strong wiring software have set constraints to control the number of windings and vias.

Various EDA company’s winding engine capabilities and constraints are sometimes set

For example, is there sufficient constraint to control serpentine 蜿蜒, whether it can control the spacing of differential pairs, etc.

This will affect whether or not the automatic routing method can meet the designer’s idea.

In addition, the difficulty of manually adjusting the wiring is also absolutely related to the ability of the winding engine.

For example, the pushing ability of the route, the pushing ability of the via hole, and even the pushing ability of the route to push the copper, etc.

So, choosing a router with strong winding engine capability is the solution

 

10. on the test coupon

Test coupon is used to measure the characteristic impedance of PCB boards produced by TDR (Time Domain Reflectometer) to meet design requirements

The impedance to be controlled generally has two conditions: single line and differential pair

Therefore, the line width and line spacing (if there is a differential pair) on the test coupon should be the same as the line to be controlled.

The most important thing is the position of the grounding point during measurement.

In order to reduce the inductance of the ground lead, the TDR probe ground is usually very close to the probe tip. Therefore, the distance between the point on the test coupon and the ground point is measured. To comply with the probe used

 

11. In high-speed PCB design, the blank area of the signal layer can be covered with copper, and how should the copper layers of signal layers be distributed on the ground and the power supply?

Generally, copper in the blank area is grounded

It is only necessary to pay attention to the distance between the copper and the signal line when applying copper next to the high-speed signal line, because the applied copper will reduce the characteristic impedance of the trace.

Also pay attention not to affect the characteristic impedance of its layer, for example in the structure of dual stripline

 

12. Is it possible to use the microstrip line model to calculate the characteristic impedance of the signal line above the power plane?

Can the signal between the power supply and the ground plane be calculated using the stripline model?

Yes, both the power plane and the ground plane must be considered as the reference plane when calculating the characteristic impedance

For example, a four-layer board: top-power layer-strata-bottom layer. In this case, the characteristic impedance of the top layer trace is a microstrip line model with the power plane as the reference plane.

 

13. Is it possible to automatically generate test points on high-density printed boards through software? Can test requirements for high-volume production be met under normal circumstances?

The general software automatically generates whether the test point satisfies the test requirement. It must see whether the specification of the plus test point meets the test equipment requirements.

In addition, if the traces are too dense and the specifications of the test points are strict, there may be no way to automatically add test points to each line. Of course, you need to manually fill in the place to be tested.

 

14. adding test points will not affect the quality of high-speed signals?

As to whether it will affect the signal quality, it depends on how quickly the test point is added and how fast the signal is.

Basically added test points (do not use the via or DIP pin as the test point) may be added to the line or a short line from the line

The former is equivalent to adding a very small capacitor on the line, the latter is more than a branch

Both of these conditions will have some effect on the high-speed signal more or less, the degree of impact is related to the signal frequency rate and edge rate (edge rate)

Influence size can be known through simulation

In principle, the smaller the test point, the better (of course, to meet the test equipment requirements) The shorter the branch, the better

 

15. a number of PCB composition system, the ground between the boards should be how to connect?

When the signal or power supply between each PCB board is connected to each other, for example, A board has power or signal sent to board B, there must be an equal amount of current flowing from the ground back to board A (this is Kirchoff current law).

The current in this formation will find the place with the least resistance and flow back.

Therefore, the number of pins assigned to the formation must not be too small at each interface, whether it is a power source or a signal interconnect, in order to reduce the impedance, which can reduce the noise in the formation.

In addition, it is also possible to analyze the entire current loop, especially the part where the current is larger, and adjust the ground or ground connection to control the current flow (for example, to make a low impedance somewhere and let most of the current flow from this Local walk) to reduce the impact on other more sensitive signals.

Alice Lu

Email: sales16@andwinpcb.com