Tell you how to make a good PCB board

Based on our past experience, I would like to talk about my views on the following aspects:

To clarify design goals

To receive a design task, first of all to clarify its design goals, is the ordinary PCB board high-frequency PCB board small signal processing PCB board or PCB with high frequency and small signal processing. If it is an ordinary PCB board, as long as it is done The layout and wiring are reasonable and tidy, and the mechanical dimensions are accurate. If there are medium load lines and long lines, it must be processed by certain means to reduce the load. The long line should be strengthened. The key point is to prevent long-line reflection when there is more than 40MHz signal on the board. Special considerations are required for these signal lines, such as crosstalk between lines. If the frequency is higher, there are stricter restrictions on the length of the wiring.

According to the network theory of distribution parameters, the interaction between the high-speed circuit and its connection is the decisive factor that can not be ignored in the system design. As the transmission speed of the gate increases, the opposition on the signal line will increase the crosstalk between adjacent signal lines. Increasingly, the power consumption and heat dissipation of a typical high-speed circuit are also large. When doing high-speed PCB, it should pay enough attention. When there are weak signals of millivolts or even microvolts on the board, these signal lines need special care. Small signals are too weak and are very susceptible to interference from other strong signals. It is necessary otherwise it will greatly reduce the signal-to-noise ratio so that the useful signal is overwhelmed by noise and cannot be effectively extracted. The commissioning of the board should also be considered in the design stage. The physical position of the test point is isolated. The isolation factor and other factors cannot be ignored because some small Signals and high-frequency signals cannot be directly added to the probe for measurement. In addition, other related factors such as the number of boards and the mechanical strength of the board of the package should be considered before the PCB board is made. The design goals are in mind.

Understand the requirements of the features of the components used for place and route

We know that some special components have special requirements in place and route. For example, analog signal amplifiers used in LOTI and APH analog signal amplifiers require a smooth ripple. Small analog small signal parts should be kept away from power devices. Small signal amplification on OTI boards. Part of it is also specially equipped with a shield to shield stray electromagnetic interference from the GLINK chip used on the NTOI board. The ECL process consumes a lot of heat and heat. The heat dissipation problem must be specially considered in the layout if natural heat dissipation is used.

It is necessary to put the GLINK chip in a place where the air circulation is relatively smooth and the heat dissipated cannot affect the other chips. If the speaker or other high-powered device on the board may cause serious pollution to the power supply, it should also cause Adequate attention.


Component layout considerations component layout

One of the first factors to consider is the electrical performance. The components with close wiring relationship should be put together as much as possible. Especially for some high-speed line layouts, it should be as short as possible. The power signals and small-signal devices should be separated to meet the circuit performance. It is also necessary to consider the placement of components in a neat and tidy manner to facilitate the position of the mechanical size socket of the test board. It is also necessary to seriously consider the grounding delay in the high-speed system and the transmission delay time on the interconnection line. It is also the factor to be considered first in the system design. The transmission time on the system has a great influence on the total system speed. Especially for the high-speed ECL circuit, although the speed of the integrated circuit block itself is very high, there is a delay of about 2 ns per 30 cm line length with a common interconnection line on the substrate. The increase in delay time can greatly reduce the system speed. Like the shift register synchronization counter.


This synchronous working component is preferably placed on the same board because the delays of the transmission of clock signals to different boards may not make the shift register owner error. If it cannot be placed on a board, synchronization is critical. The length of the clock line connected from the common clock source to each board must be equal. Four pairs of wiring considerations. With the design of OTNI and star fiber network, there will be more boards with high-speed signal lines above 100MHz. Here are some basic concepts of high-speed lines.


  1. Any long signal path on the transmission line printed circuit board can be regarded as a kind of transmission line. If the transmission delay time of the line is much shorter than the signal rise time, the reflection of the main generator will be overwhelmed during the signal rise. Representing overshoot and recoil and ringing. For most current MOS circuits, the ratio of rise time to line transmission delay time is much larger, so the trace can be longer in meters without signal distortion and faster logic. Circuits, especially ultra-high-speed ECL integrated circuits, because edge speed increases, if there is no other measure, the length of the trace must be greatly shortened to maintain signal integrity. There are two ways to make high-speed circuits work on relatively long lines. No serious waveform distortion TTL uses a Schottky diode clamp method for the fast falling edge to clamp the overshoot to a level lower than the ground potential by one diode drop. This reduces the backlash amplitude and slower rise. The edge is allowed to have an overshoot but it is attenuated by the relatively high output impedance 5080 of the circuit in the level H state. In addition, due to the high immunity of the level H state, the backlash problem is The above-mentioned TTL shaping method appears to be somewhat inferior at higher bit rates and faster edge rates when fanning along the signal line. Because there are reflected waves in the line, they tend to be synthesized at high bit rates, causing serious signals. The distortion and anti-interference ability are reduced. Therefore, in order to solve the reflection problem, another method is usually used in the ECL system. The line impedance matching method can ensure the integrity of the reflection control signal is strict. He said that for the slower edge speed Transmission lines are not very desirable for conventional TTL and CMOS devices. High-speed ECL device transmission lines with faster edge speeds are also not always required but they have the advantage of predicting the connection delay and controlling the reflection and oscillation through impedance matching when using transmission lines:
  2. The basic factors that determine whether to use a transmission line are the following five. They are the rate of the 1 system signal.

2, the connection distance 3 capacitive load (how much fanout)


3, the termination of the resistive load line 5 allowed backlash and overshoot percentage AC immunity reduction 2 types of transmission lines


(1) Coaxial cable and twisted pair They are often used in the connection between the system and the system. The characteristic impedance of the coaxial cable is usually 50 and 75 twisted pairs. Usually the microstrip line of the microstrip line on the 110 2 printed board Is a strip conductor (signal line) and the ground plane separated by a dielectric. If the thickness width of the line and the distance from the ground plane are controllable, its characteristic impedance is also controllable microstrip line. The characteristic impedance Z0 is where Er is the relative dielectric constant of the printed board dielectric material.


  1. The thickness W of the dielectric layer is the width of the line. t is the thickness of the line. The length of the transmission delay time of the microstrip line depends only on the dielectric constant and is independent of the width or spacing of the line.


Depending on the designer’s hobby and system requirements, the main advantage of the parallel terminal wiring is that the system speed is fast and the signal is transmitted on the complete distortion-free long-line load on the line, which does not affect the transmission delay time of the drive gate driving the long line, and does not Will affect its signal edge speed, but will increase the transmission delay time of the signal along the long line. When the drive is large fanout, the load can be distributed along the branch short line instead of the series terminal in the series termination. The series termination method allows the circuit to have the ability to drive several parallel load lines for series termination. Since the delay time caused by the capacitive load is about twice as large as that of the corresponding parallel terminal and the short line is caused by the capacitive load, the edge speed is slowed down and the drive gate delay time is increased, but the crosstalk of the series terminal is more than the parallel terminal connection. The main reason for the small signal is that the amplitude of the signal transmitted along the serial terminal is only one-half of the logic swing. Therefore, the switching current is only half of the switching current of the parallel-terminated switching. The signal energy is small and the crosstalk is small. When wiring technology is used to make PCBs, whether to use double-panel or multi-layer boards depends on the highest operating frequency and the complexity of the circuit system and the assembly density. When the clock frequency exceeds 200MHZ, it is best to use multi-layer boards if the operating frequency exceeds 350MHz. It is preferable to use a printed circuit board using Teflon as a dielectric layer. Because its high frequency attenuation is smaller, the parasitic capacitance is smaller, the transmission speed is faster, and the Z0 is larger, and the power consumption has the following principles on the trace of the printed circuit board. 1 All parallel signal lines should be as close as possible. Leave a large interval to reduce crosstalk. If there are two signal lines that are close together, it is better to take a ground line between the two lines to shield.


(2) When designing the signal transmission line, avoid sharp turns to prevent reflection of the characteristic impedance of the transmission line, and try to design a uniform circular arc with a certain size. The width of the printed line can be based on the above microstrip line and stripline. The characteristic impedance calculation formula calculates the characteristic impedance of the microstrip line on the printed circuit board. Generally, it is necessary to obtain a large characteristic impedance line width between 50120. It is necessary to make a narrow but very thin line and it is not easy to make various factors. Considering that the impedance value of about 68 is generally suitable, because the characteristic impedance of 68 can be optimally balanced between delay time and power consumption. A 50 transmission line will consume more power and a larger impedance, although the power consumption can be reduced. , but will delay the transmission. Since the negative line capacitance causes an increase in the transmission delay time and a decrease in the characteristic impedance, the intrinsic capacitance per unit length of the line segment having a low characteristic impedance is relatively large, so the transmission delay time and the characteristic impedance are less affected by the load capacitance. An important feature of a properly terminated transmission line is that the branch short line should have no effect on the line delay time. When Z0 is 50, the length of the branching short line must be limited to 25 cm to avoid large ringing.


  1. For a four-layer line in a double-panel or a six-layer board, the lines on both sides of the board should be perpendicular to each other to prevent mutual crosstalk from being induced.


  1. If the high-current devices such as relay indicator horns are mounted on the printed board, they should be separated separately to reduce the noise on the ground. The ground of these high-current devices should be connected to the board and back. A separate ground bus on the board, and these separate ground lines should also be connected to the ground point of the entire system.

Grace Zheng
Skype: andwinpcb