How to make your pcb wiring fast and look high-level

1. Common ground processing of digital circuits and analog circuits

Nowadays, many PCBs are no longer single-functional circuits (digital or analog circuits), but are composed of a mixture of digital and analog circuits. Therefore, it is necessary to consider the mutual interference between them when wiring, especially the noise interference on the ground line. The frequency of digital circuits is high, and the sensitivity of analog circuits is strong. For signal lines, high-frequency signal lines should be as far away from sensitive analog circuit devices as possible. For ground lines, the entire PCB has only one node to the outside world, so The problem of digital and analog common ground must be dealt with inside the PCB. However, the digital ground and analog ground are actually separated inside the board. They are not connected to each other, but are only at the interface where the PCB connects to the outside world (such as plugs, etc.). The digital ground is shorted a little bit to the analog ground, note that there is only one connection point. There are also different grounds on the PCB, which is determined by the system design.

2. The signal lines are laid on the electrical (ground) layer

When wiring multi-layer printed boards, there are not many unfinished lines left on the signal line layer. Adding more layers will cause waste and increase the workload of production, and the cost will also increase accordingly. To resolve this contradiction, you can consider wiring on the electrical (ground) layer. The power layer should be considered first, followed by the ground layer. Because it is best to preserve the integrity of the formation.


3. Treatment of connecting legs in large-area conductors

In large-area grounding (electricity), the legs of commonly used components are connected to it. The handling of the connecting legs needs to be comprehensively considered. In terms of electrical performance, it is better for the pads of the component legs to be fully connected to the copper surface, but for There are some hidden dangers in the welding assembly of components,

such as:

① Welding requires a high-power heater.

②It is easy to cause virtual solder joints. Therefore, taking into account the electrical performance and process requirements, a cross-shaped solder pad is made, which is called heat shield, commonly known as thermal pad (Thermal). In this way, the possibility of virtual solder joints due to excessive cross-section heat dissipation during welding can be eliminated. Sex is greatly reduced. The treatment of the power (ground) layer legs of multi-layer boards is the same.

4. The role of network system in wiring

In many CAD systems, routing is determined based on the network system. If the grid is too dense, although the number of channels is increased, the steps are too small and the amount of data in the image field is too large. This will inevitably have higher requirements on the storage space of the device, and it will also affect the computing speed of computer electronic products. great impact. Some paths are invalid, such as those occupied by the pads of component legs or occupied by mounting holes and mounting holes. Too sparse mesh and too few channels will have a great impact on the routing rate. Therefore, there must be a reasonable grid system to support wiring. The distance between the legs of a standard component is 0.1 inches (2.54mm), so the basis of the grid system is generally set to 0.1 inches (2.54 mm) or an integral multiple of less than 0.1 inches, such as: 0.05 inches, 0.025 inches, 0.02 inches etc.

5. Handling of power supply and ground wires

Even if the wiring in the entire PCB board is completed well, interference caused by insufficient consideration of power supply and ground wires will degrade the performance of the product and sometimes even affect the success rate of the product. Therefore, the wiring of power supply and ground wires must be taken seriously to minimize the noise interference generated by power supply and ground wires to ensure the quality of the product. Every engineer who is engaged in the design of electronic products understands the cause of noise between the ground wire and the power wire. Now we only describe the reduced noise suppression: the well-known is to add a noise between the power supply and the ground wire. Lotus root capacitor. Try to widen the width of the power and ground wires. It is best to make the ground wire wider than the power wire. Their relationship is: ground wire>power wire>signal wire. Usually the signal wire width is: 0.2~0.3mm, and the finest width can be up to 0.05 ~0.07mm, the power cord is 1.2~2.5 mm. For digital circuit PCBs, wide ground wires can be used to form a loop, that is, to form a ground network (the ground of analog circuits cannot be used in this way). Use a large area of ​​copper layer for ground wires, and use unused areas on the printed board. All places are connected to the ground and used as ground wires. Or it can be made into a multi-layer board, with power supply and ground wires occupying one layer each.

6. Design Rule Check (DRC)

After the wiring design is completed, it is necessary to carefully check whether the wiring design complies with the rules set by the designer. It is also necessary to confirm whether the rules set meet the needs of the printed board production process. General inspections include the following aspects: line to line, line to line. Whether the distance between component pads, lines and through holes, component pads and through holes, and through holes is reasonable, and whether it meets production requirements. Are the power and ground wires of appropriate width, and are the power and ground wires tightly coupled (low wave impedance)? Is there any place in the PCB where the ground wires can be widened? Whether the best measures have been taken for key signal lines, such as the shortest length, adding protective lines, and clearly separating input lines and output lines. Do the analog circuit and digital circuit parts have independent ground wires? Will the graphics (such as icons and labels) added to the PCB later cause a signal short circuit? Modify some unsatisfactory line shapes. Is there a process line added to the PCB? Does the solder mask meet the requirements of the production process, is the size of the solder mask appropriate, and is the character mark pressed on the device pad to avoid affecting the quality of the electrical assembly. Is the edge of the outer frame of the power supply ground layer in a multilayer board reduced? If the copper foil of the power supply ground layer is exposed outside the board, it is easy to cause a short circuit.

7. Via design

Via (via) is one of the important components of multi-layer PCB. The cost of drilling usually accounts for 30% to 40% of the PCB board manufacturing cost. Simply put, every hole on the PCB can be called a via. From a functional point of view, vias can be divided into two categories: one is used for electrical connections between layers; the other is used for fixing or positioning devices. From a process perspective, vias are generally divided into three categories, namely blind vias, buried vias and through vias.


1. From a design perspective, a via hole mainly consists of two parts, one is the drill hole in the middle, and the other is the pad area around the drill hole. The size of these two parts determines the size of the via hole. Obviously, when designing high-speed, high-density PCBs, designers always hope that the vias should be as small as possible, so that more wiring space can be left on the board. In addition, the smaller the vias, the smaller their own parasitic capacitance. The smaller it is, the more suitable it is for high-speed circuits. However, the reduction in hole size also brings about an increase in cost, and the size of the via hole cannot be reduced indefinitely. It is limited by process technologies such as drilling and plating: the smaller the hole, the harder it is to drill. The longer the hole takes, the easier it is to deviate from the center; and when the depth of the hole exceeds 6 times the diameter of the drilled hole, there is no guarantee that the hole wall will be evenly plated with copper. For example, the current normal thickness (through hole depth) of a 6-layer PCB board is about 50 Mil, so the minimum drilling diameter that the PCB manufacturer can provide can only reach 8 Mil.

2. Parasitic capacitance of the via hole The via hole itself has a parasitic capacitance to the ground. If it is known that the diameter of the isolation hole of the via hole on the ground layer is D2, the diameter of the via hole pad is D1, and the thickness of the PCB board is T, The dielectric constant of the board substrate is ε, then the size of the parasitic capacitance of the via hole is approximately: C=1.41εTD1/(D2-D1) The main impact of the parasitic capacitance of the via hole on the circuit is to prolong the rise time of the signal and reduce the the speed of the circuit. For example, for a PCB board with a thickness of 50 Mil, if a via hole with an inner diameter of 10 Mil and a pad diameter of 20 Mil is used, and the distance between the pad and the ground copper area is 32 Mil, we can approximately calculate the via hole through the above formula The parasitic capacitance is roughly: C=1.41×4.4×0.050×0.020/(0.032-0.020)=0.517pF. The change in rise time caused by this part of the capacitance is: T10-90=2.2C(Z0/2)=2.2 x0.517x(55/2)=31.28ps. It can be seen from these values that although the effect of slowing down the rise delay caused by the parasitic capacitance of a single via is not very obvious, designers should still consider it carefully if vias are used multiple times in the wiring for switching between layers.

3. Parasitic inductance of via holes Similarly, there are parasitic capacitances in via holes and parasitic inductance. In the design of high-speed digital circuits, the harm caused by the parasitic inductance of via holes is often greater than the influence of parasitic capacitance. Its parasitic series inductance will weaken the contribution of the bypass capacitor and weaken the filtering effect of the entire power system. We can use the following formula to simply calculate the approximate parasitic inductance of a via: L=5.08h[ln(4h/d)+1] where L refers to the inductance of the via, h is the length of the via, and d is the center The diameter of the drilled hole. It can be seen from the formula that the diameter of the via hole has a small impact on the inductance, but the length of the via hole has the greatest impact on the inductance. Still using the above example, the inductance of the via can be calculated as: L=5.08×0.050[ln(4×0.050/0.010)+1]=1.015nH. If the rise time of the signal is 1ns, then its equivalent impedance is: XL=πL/T10-90=3.19Ω. Such impedance cannot be ignored when high-frequency current flows through it. Special attention should be paid to the fact that the bypass capacitor needs to pass through two vias when connecting the power layer and the ground layer, so the parasitic inductance of the vias will increase exponentially.

4. Via-hole design in high-speed PCB Through the above analysis of the parasitic characteristics of via-holes, we can see that in B high-speed PCB design, seemingly simple via-holes often bring great negative effects to the circuit design. effect. In order to reduce the adverse effects caused by the parasitic effects of vias, try to do the following in the design:

1). Consider both cost and signal quality, and select a reasonably sized via size. For example, for 6-10-layer memory module PCB design, it is better to use 10/20Mil (drilling/pad) vias. For some high-density, small-size boards, you can also try to use 8/18Mil vias. hole. Under current technical conditions, it is difficult to use smaller-sized vias. For power or ground vias, consider using larger sizes to reduce impedance.

2). From the two formulas discussed above, it can be concluded that using a thinner PCB board is beneficial to reducing the two parasitic parameters of the vias.

3.) Try not to change layers of signal traces on the PCB board, that is to say, try not to use unnecessary vias.

4. The power and ground pins should be drilled nearby. The shorter the leads between the vias and pins, the better, because they will increase the inductance. At the same time, the power and ground leads should be as thick as possible to reduce impedance.

5. Place some grounded vias near the vias of the signal layer to provide the nearest loop for the signal. You can even place a large number of redundant ground vias on the PCB board. Of course, you also need to be flexible in your design. The via model discussed earlier is a case where each layer has a pad. Sometimes, we can reduce or even remove the pads on some layers. Especially when the density of via holes is very high, it may cause a broken groove to isolate the circuit in the copper layer. To solve this problem, in addition to moving the location of the vias, we can also consider placing the vias in the copper layer. The pad size is reduced.


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