Software simulation improves PCB design efficiency
Fundamentally, electromagnetic compatibility is tested and verified against existing models in a test chamber. These tests are not only expensive but also time-consuming. There are many ways to reduce the cost of testing by applying software simulation early in the design process.
However, EMC is a complex subject, and it is currently very difficult to achieve complete 3D simulation of complex circuit boards.
Due to these difficulties, experts can only focus on simulating key areas of the circuit board, such as power and ground systems or individual key networks to determine the causes of electromagnetic field radiation (emission) and radiation (sensitivity). The knowledge gained from these analyses will be applied to the design principles of PCB circuit designers.
In the newly developed simulation software package, users can see the complete wiring design from the most popular PCB layout tools.
The wiring review function checks various design principles for all board layers, networks or traces. The software can import wiring data from the following wiring tool providers: Altium, Cadence, Mentor, OrCAD and Zuken. The software is jointly developed by experts from professional simulation software companies and well-known IT industry giants. The former provides interfaces with a variety of PCB wiring tools, while the latter focuses on expert systems that have established and verified EMC/SI rules for decades. Over the years, the company’s experts have studied many EMC design issues using flexible measurement techniques and eventually established various effective design rules. Critical designs are checked based on these rules and the results are verified by testing. Finally, different functions are combined to form a software tool that can identify common major sources of electromagnetic interference.
This general-purpose software does not require EMC experts, and it allows PCB board designers to check whether the design complies with EMC rules.
Secondly, the software provides wiring designers with detailed descriptions and possible solutions to solve EM problems. The integrated browser can show the exact location of EMC violations in the design. In fact, the main purpose of developing this software package is to enable users without relevant EMC knowledge background to pinpoint EMC problems earlier and more easily in the design, thereby minimizing the cost of measurement and redesign.
Rule-based checking
Emission or coupling is caused by the violation of certain geometric rules. For example, considering the path of current return, each signal has a preset path for the signal track, but there are often loops in the power layer and ground layer. Return currents always take the path of least resistance and, at high frequencies, the path of lowest impedance.
The new software can determine which return paths are discontinuous. For example, the path may be interrupted by a separate plane. If the return path cannot geometrically follow the signal path, the return current will take a different path.
Depending on the size of the area around the return current, an antenna will appear to radiate or receive interfering signals, leading to a failure of EMC compliance or a possible design failure. The software tool identifies whether such copper discontinuities in the power supply plane are connected by one or more capacitors at high frequencies (see Figure 1). Those capacitors form a path with low impedance for the return current, thus avoiding the undesired loop.
EMC problems caused by capacitors too far from the signal to bridge the gap
Figure 1 EMC problems caused by capacitors too far from the signal to bridge the gap
Another rule searches for nets that change the reference plane of the signal layer and the return current. If the signal trace only changes from above to below the reference plane, the resulting radiation is small. In this case, the return current can continue to flow in the same plane. If the signal layer and the reference plane are changed at the same time, the return current path must be guaranteed (see Figure 2). When using capacitors near vias, return currents that create unwanted paths and loops must be avoided. This software design rule must recognize and allow layer changes in the area with vias under the BGA, because the return current will not go through the capacitor but through the BGA. If this rule is violated, the vias where the layer change occurs will be highlighted by the software.
If the signal layer and the reference plane are changed at the same time
Figure 2 If the signal layer and the reference plane are changed at the same time, the return current path needs to be guaranteed
At higher signal frequencies, the length of the outer layer lines needs to be reduced, the maximum allowed length of the cable is checked, and violations will be pointed out.
Another rule checks the maximum distance from the blocking capacitor to the connection pin of the supply voltage.
Because the effective radius of the blocking capacitor is very small, it cannot exceed the distance allowed by the connection to the decoupling pin. Otherwise, the capacitor has no effect and can be ignored. Violations of this rule will be listed together with the distance to the respective capacitor. The last important rule is that the traces cannot be too close to the edge of the reference plane layer. In this case, the line impedance will change and may cause the signal to reflect at the impedance discontinuity.
With this software package, specific rules can be checked, the user is guided through an error list, and then the critical areas of routing are displayed. Changing the position of components early in the design phase can create routing paths that prevent EMC problems, eliminating the need for additional shielding or filters, thus saving valuable board space and component costs.
Conclusion
As board designs become more complex and EMC specifications become more stringent, it is necessary to find solutions early in the design phase. Software simulation packages, especially when used together with effective interfaces to widely used routing tools, are of great significance in the product development process.