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Home / 15 Questions on PCB Design Skills

15 Questions on PCB Design Skills

ByGrace January 2, 2025December 31, 2024

1.How to choose PCB material?

    The selection of PCB material must strike a balance between meeting design requirements and mass production and cost

    The design requirements include electrical and mechanical parts

    Usually, this material issue is more important when designing very high-speed PCB boards (frequencies greater than GHz)

    For example, the dielectric loss of the commonly used FR-4 material at frequencies of several GHz will have a great impact on signal attenuation and may not be suitable

    In terms of electrical, pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency

    2.How to avoid high-frequency interference?

      The basic idea of ​​avoiding high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is the so-called crosstalk

      You can increase the distance between high-speed signals and analog signals, or add ground guard/shunt traces next to analog signals

      Also pay attention to the noise interference of digital ground to analog ground

      3.In high-speed design, how to solve the signal integrity problem?

        Signal integrity is basically an impedance matching problem.
        The factors that affect impedance matching include the architecture and output impedance of the signal source, the characteristic impedance of the trace, the characteristics of the load end, the topology of the trace, etc.
        The solution is to rely on termination and adjust the topology of the trace.

        4.How is the differential wiring method implemented?

        There are two points to note when routing differential pairs. One is that the length of the two lines should be as equal as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should always remain unchanged, that is, to keep them parallel.
        There are two ways to be parallel. One is that the two lines are routed on the same routing layer (side-by-side), and the other is that the two lines are routed on the upper and lower adjacent layers (over-under).
        Generally, the former side-by-side is more often implemented.

        5.For clock signal lines with only one output end, how to implement differential wiring?

        It is meaningful to use differential wiring only when the signal source and the receiving end are differential signals.
        Therefore, differential wiring cannot be used for clock signals with only one output end.

        6.Can a matching resistor be added between the differential line pairs at the receiving end?

        Matching resistors are usually added between differential line pairs at the receiving end, and their values ​​should be equal to the value of differential impedance. This will improve the signal quality. 7. Why should the wiring of differential pairs be close and parallel? The wiring of differential pairs should be appropriately close and parallel.
        The so-called appropriate closeness is because this spacing will affect the value of differential impedance, which is an important parameter for designing differential pairs.
        Parallelism is also needed to maintain the consistency of differential impedance.
        If the two lines are sometimes far away and sometimes close, the differential impedance will be inconsistent, which will affect signal integrity and time delay.

        6.How to deal with some theoretical conflicts in actual wiring.

        7.Basically, it is right to separate and isolate analog/digital ground.
        It should be noted that the signal routing should not cross the split place (moat) as much as possible, and the returning current path of the power supply and signal should not be too large.

        8.The crystal oscillator is an analog positive feedback oscillation circuit.

        To have a stable oscillation signal, the loop gain and phase specifications must be met. The oscillation specifications of this analog signal are easily interfered. Even if ground guard traces are added, it may not be possible to completely isolate the interference.
        And if they are too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit.
        Therefore, the distance between the crystal oscillator and the chip must be as close as possible.

        9.It is true that there are many conflicts between high-speed wiring and EMI requirements.

        But the basic principle is that the resistors, capacitors or ferrite beads added due to EMI cannot cause some electrical characteristics of the signal to be inconsistent with the specifications.
        Therefore, it is best to first use the techniques of arranging routing and PCB stacking to solve or reduce EMI problems, such as routing high-speed signals on the inner layer.
        Finally, use resistors, capacitors or ferrite beads to reduce damage to the signal.

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        10.How to solve the contradiction between manual routing and automatic routing of high-speed signals?

          Most of the current powerful wiring software’s automatic routers have set constraints to control the winding method and the number of vias. The winding engine capabilities and constraint setting items of each EDA company are sometimes very different. For example, whether there are enough constraints to control the winding method of the serpentine, whether the routing spacing of the differential pair can be controlled, etc. This will affect whether the routing method generated by the automatic routing can meet the designer’s ideas. In addition, the difficulty of manually adjusting the routing is also absolutely related to the capabilities of the winding engine. For example, the pushing ability of the routing, the pushing ability of the via, and even the pushing ability of the routing pair copper, etc. Therefore, choosing a router with a strong winding engine capability is the solution.

          11. About test coupons.

          The test coupon is used to measure the characteristic impedance of the produced PCB board with TDR (Time Domain Reflectometer) to see if it meets the design requirements. Generally, the impedance to be controlled is single line and differential pair. Therefore, test The line width and line spacing on the coupon (when there is a differential pair) should be the same as the line to be controlled.

          The most important thing is the location of the ground point during measurement.

          In order to reduce the inductance of the ground lead, the grounding point of the TDR probe is usually very close to the probe tip. Therefore, the distance and method between the point where the signal is measured on the test coupon and the grounding point should be consistent with the probe used.

          12.In high-speed PCB design, the blank area of ​​the signal layer can be copper-plated, and how should the copper of multiple signal layers be distributed on the ground and power supply?

            Generally, the copper in the blank area is grounded in most cases.
            Just pay attention to the distance between the copper and the signal line when copper is applied next to the high-speed signal line, because the copper applied will reduce the characteristic impedance of the line a little.
            Also, be careful not to affect the characteristic impedance of other layers, such as in the dual stripline structure.

            1. Can the signal line on the power plane be calculated using the microstrip line model?

            Can the signal between the power and ground planes be calculated using the stripline model?

            Yes, when calculating characteristic impedance, both the power plane and the ground plane must be considered as reference planes.
            For example, a four-layer board: top layer-power layer-ground layer-bottom layer. At this time, the model of the characteristic impedance of the top layer routing is a microstrip line model with the power plane as the reference plane.

            13.Can the automatic generation of test points by software on high-density printed circuit boards generally meet the test requirements of mass production?

              Whether the test points automatically generated by general software meet the test requirements must be determined by whether the specifications for adding test points meet the requirements of the test equipment.

              In addition, if the routing is too dense and the specifications for adding test points are strict, it may not be possible to automatically add test points to each line. Of course, the places to be tested need to be filled manually.

              14.Will adding test points affect the quality of high-speed signals?

                Whether it will affect the signal quality depends on the method of adding test points and how fast the signal is. Basically, the additional test points (not using the existing vias (via or DIP pins) on the line as test points) may be added to the line or a short line may be pulled out from the line. The former is equivalent to adding a very small capacitor on the line, and the latter is an additional branch. Both of these situations will have some impact on high-speed signals, and the extent of the impact is related to the frequency speed of the signal and the edge rate of the signal.

                The impact can be known through simulation. In principle, the smaller the test point, the better (of course, it must meet the requirements of the test equipment) and the shorter the branch, the better. 15. When several PCBs form a system, how should the ground wires between the boards be connected? When the signals or power supplies between the interconnected PCB boards are in operation, for example, when board A sends power or signals to board B, there will be an equal amount of current flowing back from the ground layer to board A (this is Kirchoff current law).

                The current on the ground layer will find the place with the smallest impedance to flow back. Therefore, at each interface where power or signals are connected, the number of pins allocated to the ground layer cannot be too small to reduce impedance, which can reduce noise on the ground layer. In addition, the entire current loop can be analyzed, especially the part with large current, and the connection method of the ground layer or ground wire can be adjusted to control the flow of current (for example, create low impedance at a certain place to let most of the current flow from this place) to reduce the impact on other more sensitive signals.

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