PCB Routing Rules for Single-Ended Signals

Sometimes, the distinction between what is considered a “slow” or “fast” signal can seem arbitrary and can depend on who you ask. A related topic is whether a PCB trace is electrically “short” or “long,” and you’ll likely find just as much disagreement on that topic. Whether you need to route slow or fast signals in your PCB, your traces will need to follow some PCB routing rules to ensure your board functions as intended.

Before you start routing signals between components, you’ll need to review your design rules and adjust them to meet your signal standards. Here are some important PCB routing rules to set before you start routing signals around your PCB.

PCB Routing Rules for Single-Ended Signals

The most important thing to note about PCB routing rules is that routing standards don’t necessarily define themselves as “slow speed” or “high speed.” This distinction was largely created and perpetuated by PCB designers and was largely caused by the signal integrity issues that arise when signal rise times become very fast (less than 1 ns). Therefore, it’s even more important to understand the constraints in your signal standards when setting your design rules, whether you’re dealing with slow or fast signal speeds.

The first place to look for required design rules is in the documentation for the signaling standard. The documentation for most standards is freely available online. As you create more designs, you will become more familiar with these standards and know which rules to set in your designs. Some of the most common PCB routing rules that apply to many standards for single-ended signals are:

Matched lengths.

For bus standards or parallel data routing with source synchronous clocks, you need to enforce length matching for all nets in a group within a certain tolerance. When routing, this is done by adding length adjustment structures to the nets.

Via transitions.

Some standards recommend limiting the number of via transitions to prevent excessive losses, reflections, and other parasitics.

Maximum length.

Sometimes a maximum length for a net is specified for a given loss tangent value to prevent excessive signal attenuation. If you are using a low-loss laminate, you can extend the length based on the difference in loss tangent values.

Clearance.

Traces need to be kept separate from other objects (pads, components, planes, etc.) that are not part of the net. This ensures manufacturability, reduces unwanted parasitics, and provides ESD protection in high-voltage designs.

Width and impedance.

These two quantities are related to each other and are used for controlled impedance in high-speed designs. Learn how to specify impedance and trace width as PCB routing rules.

If you need to assign the same PCB routing rules to a group of nets (very common for groups of single-ended signals), the quickest way is to assign all nets in a group to a net class. You can do this from the Design → Class option in the PCB Editor window. Once nets are assigned to classes, you can use the PCB Rules and Constraints Editor to assign design rules to individual nets or net classes.

Other PCB routing rules that may not apply to specific signaling standards are also used to help ensure your design is organized. Routing topology and routing layer restrictions are two primary examples. For more advanced designs, such as components with BGA footprints, you can use design rules to configure fan-out strategies. Handling differential pairs requires its own set of design rules, as shown in the next section.

Differential Pair Routing Rules

Differential pairs are unique in that both slow and fast signals can be routed as differential pairs. Regardless of whether the signal is fast or slow, differential pairs still need to adhere to some of the design rules that are normally implemented for single-ended signals. Four important design rules to consider for differential pairs are:

Impedance tolerance.

Even if you are routing a length less than the critical length, it is best to bite the bullet and create an impedance profile for the differential pair, unless your signaling standard dictates otherwise. Other geometric constraints will depend on the allowable impedance variation along the differential pair.

Maximum decoupled length.

This tells you the longest distance the two sides of the differential pair can remain uncoupled (i.e., a large distance apart). This is important because the uncoupled section looks like an impedance discontinuity, so it must be short enough.

Length matching.

Remember that differential signals are read by taking the difference between the two signals, so the two signals need to arrive at the receiver at the same time. Faster signals require smaller length matching tolerances.

Maximum net length.

Just like single-ended signals, differential signaling standards may have maximum length restrictions. Take the CAN bus as an example; even though this is a slow standard, the maximum link length (PCB trace + cable) will depend on the data rate you will be using in your system.

If you are using high-speed differential pairs, any of the other standard high-speed design rules discussed above can be applied to the differential pairs. Note that it is easiest to assign the relevant differential pairs to a “Differential Pair Net Class” and then select the class that will be controlled by each design rule.

If the design rule is not configured to accept a Differential Pair Net Class in the “Where Objects Match” drop-down menu, a custom query can be created using the Query Builder. This is shown below for assigning a maximum length to the Differential Pair Net Class (found in the “High Speed” area of the PCB Rules and Constraints Editor).