High speed PCB circuit design tips and precautions

1. How to choose PCB board material?

The choice of PCB board material must strike a balance between meeting design requirements and mass production and cost. The design requirements include both electrical and mechanical components. Usually this material issue will be more important when designing very high-speed PCB boards (frequency greater than GHz). For example, the dielectric loss of the commonly used FR-4 material at frequencies of several GHz will have a great impact on signal attenuation and may not be suitable for use. In electrical terms, attention should be paid to whether the dielectric constant (dielectric constant) and dielectric loss are appropriate at the designed frequency.

2. How to avoid high-frequency interference?

The basic idea to avoid high-frequency interference is to minimize the interference of high-frequency signal electromagnetic fields, which is the so-called crosstalk. You can increase the distance between the high-speed signal and the analog signal, or add ground guard/shunt traces next to the analog signal. Also pay attention to the noise interference from digital ground to analog ground.

3. How to solve the problem of signal integrity in high-speed design?

Signal integrity is basically a matter of impedance matching. The factors that affect impedance matching include the structure and output impedance of the signal source, the characteristic impedance of the wiring, the characteristics of the load end, the topology structure of the wiring, etc. The solution is to rely on termination and adjusting the wiring topology.

4. How is differential wiring implemented?

There are two points to note when wiring a differential pair. One is that the length of the two lines should be as long as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should always remain unchanged, that is, it should be kept parallel. There are two ways of parallelism, one is that two lines run on the same routing layer (side-by-side), and the other is two lines run on two adjacent layers (over-under). Generally, the former side-by-side (side by side, side by side) is more commonly implemented.

5. How to implement differential wiring for a clock signal line with only one output terminal?

To use differential wiring, it only makes sense if the signal source and the receiving end are also differential signals. Therefore, differential wiring cannot be used for clock signals with only one output terminal.

6. Can a matching resistor be added between the differential line pairs at the receiving end?

A matching resistor is usually added between the differential pairs at the receiving end, and its value should be equal to the value of the differential impedance. The signal quality will be better this way.

7. Why should the wiring of differential pairs be close and parallel?

The routing of differential pairs should be appropriately close and parallel. The so-called appropriate proximity is because this spacing will affect the value of differential impedance (differential impedance), which is an important parameter in designing a differential pair. Parallel is also required to maintain consistency in differential impedance. If the two lines are suddenly far away and suddenly close, the differential impedance will be inconsistent, which will affect signal integrity and timing delay.

8. How to deal with some theoretical conflicts in actual wiring?

Basically, it is right to separate the analog/digital ground. It should be noted that the signal traces should not cross the divided area (moat) as much as possible, and the returning current path (returning current path) of the power supply and signal should not become too large.

The crystal oscillator is an analog positive feedback oscillation circuit. To have a stable oscillation signal, it must meet the loop gain and phase specifications. The oscillation specification of this analog signal is easily disturbed. Even adding ground guard traces may not be able to completely isolate the interference. And if it is too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal oscillator and the chip must be as close as possible.

It is true that high-speed cabling has many conflicts with EMI requirements. But the basic principle is that the resistance, capacitance or ferrite bead added due to EMI cannot cause some electrical characteristics of the signal to not meet the specifications. Therefore, first use the skills of arranging wiring and PCB lamination to solve or reduce EMI problems, such as high-speed signals running on the inner layer. Only use resistors, capacitors or ferrite beads to reduce damage to the signal.

9. How to solve the contradiction between manual wiring and automatic wiring of high-speed signals?

Most of the automatic routers in today’s powerful wiring software have set constraints to control the winding method and the number of vias. The winding engine capabilities and constraint setting items of various EDA companies are sometimes very different. For example, are there enough constraints to control the way the serpentine lines meander, can they control the trace spacing of differential pairs, etc. This will affect whether the routing pattern produced by automatic routing can conform to the designer’s ideas. In addition, the difficulty of manually adjusting the wiring is also related to the capabilities of the winding engine. For example, the pushing ability of traces, the pushing ability of vias, and even the pushing ability of traces on copper coating, etc. Therefore, choosing a router with a strong winding engine is the solution.

10. About test coupon.

The test coupon is used to measure whether the characteristic impedance of the produced PCB board meets the design requirements using TDR (Time Domain Reflectometer). Generally, there are two types of impedance to be controlled: single line and differential pair. Therefore, the line width and line spacing (when there is a differential pair) on the test coupon must be the same as the lines to be controlled. What matters is the location of the ground point when measuring. In order to reduce the inductance value of the ground lead, the grounded place of the TDR probe (probe) is usually very close to the place where the signal is measured (probe tip). Therefore, the distance and method between the signal measuring point and the grounding point on the test coupon Be consistent with the probe used.

11. In high-speed PCB design, the blank area of the signal layer can be covered with copper. How should the copper of multiple signal layers be distributed between grounding and power supply?

Generally, most of the copper in the blank area is grounded. Just pay attention to the distance between the copper and the signal line when applying copper next to the high-speed signal line, because the copper applied will reduce the characteristic impedance of the line a little. Also be careful not to affect the characteristic impedance of other layers, such as in a dual strip line structure.

12. Can the characteristic impedance of the signal line on the power plane be calculated using the microstrip line model? Can the signal between the power supply and the ground plane be calculated using the stripline model?

Yes, both the power plane and the ground plane must be regarded as reference planes when calculating characteristic impedance. For example, a four-layer board: top layer – power layer – ground layer – bottom layer. At this time, the model of the characteristic impedance of the top layer trace is a microstrip line model with the power plane as the reference plane.

13. Can automatically generating test points through software on high-density printed boards generally meet the testing requirements of mass production?

Generally, whether the test points automatically generated by the software meet the test requirements must depend on whether the specifications for adding test points meet the requirements of the test equipment. In addition, if the wiring is too dense and the specifications for adding test points are strict, it may not be possible to automatically add test points to each segment of the line. Of course, you need to manually fill in the places to be tested.

14. Will adding test points affect the quality of high-speed signals?

Whether it will affect the signal quality depends on the method of adding test points and how fast the signal is. Basically, additional test points (not using existing via or DIP pins on the line as test points) may be added to the line or a short section of wire may be pulled from the line. The former is equivalent to adding a small capacitor online, while the latter is an extra branch. Both of these situations will have some impact on high-speed signals, and the degree of impact is related to the frequency speed of the signal and the edge rate of the signal. The magnitude of the impact can be known through simulation. In principle, the smaller the test point, the better (of course it must meet the requirements of the test equipment) and the shorter the branch, the better.

15. Several PCBs form a system. How should the ground wires between the boards be connected?

When the signals or power between the interconnected PCB boards are in action, for example, board A has power or signals sent to board B, an equal amount of current will flow from the ground layer back to board A (this is Kirchoff current law). The current in this ground layer will find a place with resistance and flow back. Therefore, at each interface where power or signals are connected to each other, the number of pins allocated to the ground layer should not be too small to reduce impedance, which can reduce noise on the ground layer. In addition, you can also analyze the entire current loop, especially the part with a larger current, and adjust the connection method of the ground layer or ground wire to control the flow of the current (for example, create a low impedance somewhere so that most of the current flows from this place) to reduce the impact on other more sensitive signals.

16. Can you introduce some foreign technical books and data on high-speed PCB design?

Nowadays, high-speed digital circuits are used in related fields such as communication networks and calculators. In terms of communication networks, the operating frequency of PCB boards has reached around GHz, and the number of stacked layers is as high as 40 as far as I know. Calculator-related applications are also due to the advancement of chips. Whether it is a general PC or a server (Server), the operating frequency of the board has reached above 400MHz (such as Rambus). In response to the demand for high-speed and high-density wiring, the demand for blind/buried vias, mircrovias and build-up process technologies is gradually increasing. These design requirements are available for mass production by manufacturers.

17. Two commonly referenced characteristic impedance formulas:

Microstrip Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)] Among them, W is the line width, T is the copper thickness of the trace, and H is The distance from the trace to the reference plane, Er is the dielectric constant of the PCB board material. This formula must be applied under the conditions of 0.1<(W/H)<2.0 and 1<(Er)<15.

Stripline (stripline) Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} where H is the distance between the two reference planes, and the trace is located in the middle of the two reference planes . This formula can only be applied when W/H<0.35 and T/H<0.25.

18. Can a ground wire be added in the middle of the differential signal line?

Generally, a ground wire cannot be added in the middle of differential signals. Because an important point in the application principle of differential signals is to take advantage of the benefits brought by mutual coupling between differential signals, such as flux cancellation, noise immunity, etc. If a ground wire is added in the middle, the coupling effect will be destroyed.

19. Does the design of rigid-flexible boards require special design software and specifications? Where in China can we undertake the processing of this type of circuit boards?

Flexible Printed Circuits (Flexible Printed Circuits) can be designed using general PCB design software. The same Gerber format is used for production by FPC manufacturers. Since the manufacturing process is different from that of general PCBs, each manufacturer will have its own restrictions on line width, line spacing, and aperture (via) based on their manufacturing capabilities. In addition, some copper sheets can be laid at the turning points of the flexible circuit board for reinforcement. As for the manufacturer, you can go online and search for the keyword “FPC” and you should be able to find it.

20. What are the principles for properly selecting the grounding point between PCB and shell?

The principle of selecting the PCB and housing ground points is to use the chassis ground to provide a low-impedance path for the return current (returning current) and control the path of the return current. For example, usually near high-frequency devices or clock generators, you can use fixing screws to connect the ground layer of the PCB to the chassis ground to minimize the entire current loop area, thereby reducing electromagnetic radiation.

21. What aspects should we start from when debugging circuit boards?

As far as digital circuits are concerned, first determine three things in order:

1. Confirm that all power supply values meet the design requirements. Some systems with multiple power supplies may require certain specifications for the order and speed of power supply between certain power supplies.

2. Confirm that all clock signal frequencies are working properly and there are no non-monotonic problems on the signal edges.

3. Confirm whether the reset signal meets the specification requirements. If these are normal, the chip should send out a cycle signal. Next, debug according to the system operating principle and bus protocol.

22. When the size of the circuit board is fixed, if the design needs to accommodate more functions, it is often necessary to increase the wiring density of the PCB. However, this may lead to increased mutual interference of the wiring. At the same time, too thin wiring will also increase the impedance. It cannot be reduced. Please introduce the techniques in high-speed (>100MHz) high-density PCB design?

When designing high-speed and high-density PCBs, special attention must be paid to crosstalk interference because it has a great impact on timing and signal integrity. Here are a few things to note:

Control the continuity and matching of trace characteristic impedance.

The size of the trace spacing. A commonly seen spacing is twice the line width. You can use simulation to know the impact of trace spacing on timing and signal integrity, and find out the tolerable spacing. The results of different chip signals may be different.

Choose the appropriate termination method.

Avoid routing the traces on the upper and lower adjacent layers in the same direction, or even if the traces overlap each other, because this crosstalk is greater than that of adjacent traces on the same layer.

Use blind/buried vias to increase the wiring area. But the production cost of PCB board will increase. It is indeed difficult to achieve complete parallelism and equal length in actual execution, but we should still try our best to achieve it.co

In addition, differential termination and mmon-mode termination can be reserved to mitigate the impact on timing and signal integrity.

23. The filtering at the analog power supply often uses LC circuits. But why sometimes LC filtering effect is worse than RC?

Comparison of LC and RC filtering effects must consider whether the frequency band to be filtered and the selection of the inductor value are appropriate. Because the inductance (reactance) of the inductor is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC. However, the price to pay for using RC filtering is that the resistor itself consumes energy and has poor efficiency, and you must pay attention to the selected resistor.

24. What is the method for selecting inductors and capacitor values when filtering?

In addition to considering the noise frequency that you want to filter out, the selection of the inductor value must also consider the response ability of the instantaneous current. If there is a chance that the output end of the LC needs to output a large current instantaneously, an inductor value that is too large will hinder the speed of the large current flowing through the inductor and increase ripple noise. The capacitance value is related to the tolerance of the ripple noise specification. The smaller the ripple noise value requirement, the larger the capacitance value will be. The ESR/ESL of the capacitor will also have an impact. In addition, if this LC is placed at the output end of a switching regulation power, you must also pay attention to the impact of the pole/zero generated by this LC on the stability of the negative feedback control loop. .

25. How to meet EMC requirements as much as possible without causing too much cost pressure?

The increased cost due to EMC on the PCB board is usually due to increasing the number of ground layers to enhance the shielding effect and adding ferrite beads, chokes and other high-frequency harmonic suppression devices. In addition, it is usually necessary to match the shielding structure of other institutions to make the entire system pass EMC requirements. The following only provides a few PCB board design tips to reduce the electromagnetic radiation effects generated by circuits.

Try to use devices with a slower signal slope (slew rate) to reduce the high-frequency components generated by the signal.

Pay attention to the placement of high-frequency components and do not place them too close to external connectors.

Pay attention to the impedance matching of high-speed signals, wiring layers and their return current paths to reduce high-frequency reflection and radiation.

Place sufficient and appropriate decoupling capacitors on the power pins of each device to mitigate noise on the power and ground planes. Pay special attention to whether the frequency response and temperature characteristics of the capacitor meet the design requirements.

The ground near the external connector can be properly separated from the ground layer, and the ground of the connector can be connected to the chassis ground nearby.

Ground guard/shunt traces can be appropriately used next to some particularly high-speed signals. But pay attention to the impact of guard/shunt traces on the characteristic impedance of the wiring.

The power layer is 20H smaller than the ground layer, and H is the distance between the power layer and the ground layer.

26. When there are multiple digital/analog function blocks in a PCB board, the common practice is to separate the digital/analog ground. Why?

The reason for separating digital/analog ground is because digital circuits will generate noise in the power supply and ground when switching between high and low potentials. The size of the noise is related to the speed of the signal and the size of the current. If the ground plane is not divided and the noise generated by the circuits in the digital area is large and the circuits in the analog area are very close, then even if the digital-analog signals do not cross, the analog signals will still be interfered by the ground noise. In other words, the method of not dividing the digital and analog ground can only be used when the analog circuit area is far away from the digital circuit area that generates large noise.

27. Another approach is to ensure that the digital/analog ground is laid out separately and the digital/analog signal traces do not cross each other. The entire PCB board ground is not divided, and the digital/analog ground is connected to this ground plane. What’s the point?

The requirement that digital-analog signal traces cannot cross is because the return current path of a slightly faster digital signal will try to flow back to the source of the digital signal along the ground near the bottom of the trace. If the digital-analog signal trace is traced crossover, the noise generated by the return current will appear in the analog circuit area.

28. How to consider impedance matching issues when designing high-speed PCB design schematics?

When designing high-speed PCB circuits, impedance matching is one of the design elements. The impedance value is related to the wiring method, such as whether it is on the surface layer (microstrip) or inner layer (stripline/double stripline), the distance from the reference layer (power layer or ground layer), trace width, PCB material, etc. Will affect the characteristic impedance value of the trace. That is to say, the impedance value cannot be determined until after wiring. Generally, simulation software cannot consider some wiring situations with discontinuous impedance due to limitations of the circuit model or the mathematical algorithm used. At this time, only some terminators (terminations), such as series resistors, etc., can be reserved on the schematic diagram. Mitigates the effects of trace impedance discontinuities. The real fundamental solution to the problem is to try to avoid impedance discontinuity when wiring.

29. Where can I provide a more accurate IBIS model library?

30. When designing high-speed PCB, from what aspects should designers consider EMC and EMI rules?

Generally, EMI/EMC design needs to consider both radiated and conducted aspects. The former belongs to the higher frequency part (>30MHz) and the latter belongs to the lower frequency part (<30MHz). So you can’t just pay attention to the high frequencies and ignore the low frequencies. A good EMI/EMC design must consider the location of the device, the arrangement of the PCB stack, the routing of important connections, the selection of devices, etc. at the beginning of the layout. If these are not properly arranged in advance, they will be solved afterwards. It will achieve twice the result with half the effort and increase the cost. For example, the location of the clock generator should not be close to the external connector. High-speed signals should be routed to the inner layer as much as possible. Pay attention to the characteristic impedance matching and the continuity of the reference layer to reduce reflection. The slope of the signal pushed by the device (slew rate ) as small as possible to reduce high-frequency components. When selecting decoupling/bypass capacitors, pay attention to whether their frequency response meets the requirements to reduce power layer noise. In addition, pay attention to the return path of the high-frequency signal current to keep the loop area as small as possible (that is, the loop impedance is as small as possible) to reduce radiation. The range of high-frequency noise can also be controlled by dividing the strata. , properly select the ground point (chassis ground) of the PCB and the housing.

31. How to choose EDA tools?

Among the current PCB design software, thermal analysis is not a strong point, so it is not recommended to use it. For other functions 1.3.4, you can choose PADS or Cadence, both of which have good performance and price. Beginners in PLD design can use the integrated environment provided by PLD chip manufacturers. When designing more than one million gates, they can choose single-point tools.

32. Please recommend an EDA software suitable for high-speed signal processing and transmission.

For conventional circuit design, INNOVEDA’s PADS is very good and has accompanying simulation software, and this type of design often accounts for 70% of applications. When doing high-speed circuit design, analog and digital mixed circuits, the solution using Cadence should be a software with relatively good performance and price. Of course, the performance of Mentor is still very good, especially in terms of its design process management. (Datang Telecom Technology Wang Sheng)

33. What is the explanation of the meaning of each layer of PCB board?

Topoverlay – the name of the top device, also called top silkscreen or top component legend, such as R1 C5,

IC10.bottomoverlay–Same as multilayer–if you design a 4-layer board, you place a free pad or via and define it as multilay, then its pad will automatically appear on the 4 layers. If you only define it as top layer, then its pad will only appear on the top layer.

34. What aspects should be paid attention to in the design, routing and layout of high-frequency PCBs above 2G?

High-speed PCBs above 2G belong to radio frequency circuit design and are not within the scope of discussion of high-speed digital circuit design. The layout and routing of the RF circuit should be considered together with the schematic diagram, because layout and routing will cause distribution effects. Moreover, some passive components in RF circuit design are realized through parametric definition and special-shaped copper foil. Therefore, EDA tools are required to provide parametric devices and edit special-shaped copper foil. Mentor’s boardstation has a dedicated RF design module that can meet these requirements. Moreover, general radio frequency design requires specialized radio frequency circuit analysis tools. The well-known one in the industry is Agilent’s eesoft, which has a good interface with Mentor’s tools.

35. For high-speed PCB design above 2G, what rules should be followed for microstrip design?

RF microstrip line design requires the use of three-dimensional field analysis tools to extract transmission line parameters. All rules should be specified in this field extraction tool.

36. For a PCB with all digital signals, there is an 80MHz clock source on the board. In addition to using wire mesh (grounding), in order to ensure sufficient driving capability, what kind of circuit should be used for protection?

To ensure the driving capability of the clock, it should not be achieved through protection. Generally, a clock driver chip is used. Generally, concerns about clock drive capability are caused by multiple clock loads. A clock driver chip is used to convert one clock signal into several, using point-to-point connections. When selecting a driver chip, in addition to ensuring that it basically matches the load and that the signal edge meets the requirements (generally the clock is an edge-valid signal), when calculating the system timing, the clock delay in the driver chip must be included.

37. If a separate clock signal board is used, what kind of interface is generally used to ensure that the transmission of the clock signal is minimally affected?

The shorter the clock signal, the smaller the transmission line effect. Using a separate clock signal board will increase the signal wiring length. And the grounding power supply of the single board is also a problem. If long-distance transmission is required, it is recommended to use differential signaling. LVDS signals can meet the drive capability requirements, but your clock isn’t too fast to be necessary.

38. 27M, SDRAM clock line (80M-90M), the second and third harmonics of these clock lines happen to be in the VHF band, and the high-frequency interference from the receiving end causes great interference. Besides shortening the cable length, what other good ways are there?

If the third harmonic is large and the second harmonic is small, it may be because the signal duty cycle is 50%, because in this case, the signal has no even harmonics. At this time, the signal duty cycle needs to be modified. In addition, for unidirectional clock signals, source-end series matching is generally used. This suppresses secondary reflections but does not affect the clock edge rate. The source matching value can be obtained by using the formula in the figure below.

39. What is the wiring topology?

Topology, also called routing order in some cases, is the wiring order for a multi-port connected network.

40. How to adjust the wiring topology to improve signal integrity?

The signal direction of this kind of network is relatively complicated, because the topology has different effects on one-way, two-way signals, and signals of different levels. It is difficult to say which topology is beneficial to the signal quality. Moreover, during pre-simulation, the topology to be used is very demanding for engineers, who must understand the circuit principles, signal types, and even wiring difficulty.

41. How to reduce EMI problems by arranging laminates?

First of all, EMI must be considered from a system perspective, and PCB alone cannot solve the problem. For EMI, I think lamination mainly provides a short return path for signals, reduces the coupling area, and suppresses differential mode interference. In addition, the ground layer and the power layer are tightly coupled and appropriately extended than the power layer, which is beneficial to suppressing common mode interference.

42. Why should we lay copper?

There are several reasons for generally laying copper. 1. EMC. For large areas of ground or power supply copper, it will play a shielding role, and some special grounds, such as PGND, will play a protective role. 1. PCB process requirements. Generally, in order to ensure the plating effect or lamination without deformation, copper is laid on PCB layers with less wiring. 3. Signal integrity requirements, giving high-frequency digital signals a complete return path and reducing DC network wiring. Of course, there are also reasons such as heat dissipation, copper laying required for installation of special devices, etc.

43. In a system, including dsp and pld, what issues should be paid attention to when wiring?

Look at the ratio of your signal rate to the wiring length. If the delay of the signal on the transmission line is comparable to the signal change edge time, the signal integrity issue must be considered. In addition, for multiple DSPs, clock and data signal routing topology will also affect signal quality and timing, which requires attention.

44. In addition to the protel tool for wiring, are there any other good tools?

As for tools, in addition to PROTEL, there are many wiring tools, such as MENTOR’s WG2000, EN2000 series and powerpcb, Cadence’s allegro, Zuken’s cadstar, cr5000, etc., each with its own strengths.

45. What is the “signal return path”?

Signal return path, that is, return current. When high-speed digital signals are transmitted, the signal flows from the driver along the PCB transmission line to the load, and then returns from the load to the driver through a short path along the ground or power supply. This return signal on the ground or power supply is called the signal return path. Dr. Johnson explains in his book that high-frequency signal transmission is actually a process of charging the dielectric capacitance sandwiched between the transmission line and the DC layer. SI analyzes the electromagnetic properties of this enclosure and the coupling between them.

46. How to perform SI analysis on connectors?

In the IBIS3.2 specification, there is a description of the connector model. Generally the EBD model is used. If it is a special board, such as a backplane, a SPICE model is required. You can also use multi-board simulation software (HYPERLYNX or IS_multiboard). When establishing a multi-board system, enter the distribution parameters of the connector, which are generally obtained from the connector manual. Of course this method will not be enough, but as long as it is within the acceptable range.

47. What are the termination methods?

Terminal, also called matching. Generally, they are divided into active end matching and terminal matching according to the matching position. Among them, source matching is generally resistor series matching, and terminal matching is generally parallel matching. There are many methods, including resistor pull-up, resistor pull-down, Thevenin matching, AC matching, and Schottky diode matching.

48. What factors determine the use of termination (matching)?

The matching method is generally determined by the BUFFER characteristics, top conditions, level types and decision methods. The signal duty cycle, system power consumption, etc. must also be considered.

49. What are the rules for using termination (matching)?

The key to digital circuits is timing. The purpose of adding matching is to improve the signal quality and obtain a determinable signal at the decision moment. For level valid signals, the guarantee is built in