How can we make a good PCB board?
Everyone knows that making a PCB board is to turn the designed schematic diagram into a real PCB circuit board. Please don’t underestimate this process. There are many things that work in principle but are difficult to achieve in engineering, or things that others can achieve but others cannot.
Therefore, it is not difficult to make a PCB board, but it is not an easy task to make a good PCB board. The two major difficulties in the field of microelectronics are the processing of high-frequency signals and weak signals. In this regard, the level of PCB production is particularly important. The same principle design, the same components, and different people will produce different results. So how can we make a good PCB board?
1.Make the design goal clear
When receiving a design task, we must first make its design goal clear, whether it is an ordinary PCB board, a high-frequency PCB board, a small signal processing PCB board, or a PCB board that has both high frequency and small signal processing. If it is an ordinary PCB board, as long as the layout and wiring are reasonable and neat, and the mechanical dimensions are accurate, if there are medium-load lines and long lines, certain means must be used to deal with them, reduce the load, and strengthen the drive of long lines. The focus is to prevent long line reflections. When there are signal lines exceeding 40MHz on the board, these signal lines must be specially considered, such as problems such as crosstalk between lines. If the frequency is higher, there will be stricter restrictions on the length of the wiring.
According to the network theory of distributed parameters, the interaction between high-speed circuits and their connections is a decisive factor and cannot be ignored in system design. With the increase of gate transmission speed, the opposition on the signal line will increase accordingly. The crosstalk between adjacent signal lines will increase proportionally. Usually, the power consumption and heat dissipation of high-speed circuits are also very large.
When making high-speed PCB, sufficient attention should be paid. When there are weak signals at the millivolt level or even microvolt level on the board, these signal lines need special care. Small signals are very susceptible to interference from other strong signals because they are too weak. Shielding measures are often necessary. Otherwise, the signal-to-noise ratio will be greatly reduced, so that the useful signal is drowned by noise and cannot be effectively extracted. The adjustment and testing of the board should also be considered in the design stage. The physical location of the test point and the isolation of the test point cannot be ignored because some small signals and high-frequency signals cannot be directly measured by adding probes. In addition, other related factors should be considered, such as the number of board layers, the package shape of the components used, and the mechanical strength of the board. Before making the PCB board, the design goals of the design should be made clear.
2.Understand the requirements of layout and wiring for the functions of the components used
We know that some special components have special requirements for layout and wiring, such as the analog signal amplifiers used in LOTI and APH. The power supply requirements for the analog signal amplifiers are stable and small ripple. The analog small signal part should be as far away from the power device as possible. The small signal amplifier part on the OTI board is also specially equipped with a shielding cover to shield the stray electromagnetic interference. The GLINK chip used on the NTOI board uses the ECL process, which has high power consumption and high heat generation. Special consideration must be given to the heat dissipation problem during layout if natural heat dissipation is used.
The GLINK chip should be placed in a place where the air circulation is relatively smooth, and the heat dissipated should not have a big impact on other chips. If there are speakers or other high-power devices on the board, it may cause serious pollution to the power supply, which should also be given enough attention.
3.Consideration of component layout Component layout
The first factor to consider is electrical performance. Components with close connection relationship should be placed together as much as possible. Especially for some high-speed lines, it should be as short as possible. Power signal and small signal devices should be separated. Under the premise of meeting the circuit performance, the components should be placed neatly and beautifully for testing. The mechanical size of the board and the location of the socket should also be considered carefully. The grounding and transmission delay time on the interconnection line in the high-speed system are also the first factors to be considered in system design.
The transmission time of the signal line has a great influence on the overall system speed, especially for the high-speed ECL circuit. Although the integrated circuit block itself has a high speed, the delay amount of about 2ns per 30cm line length on the baseboard brings about an increase in delay time, which can greatly reduce the system speed. Like the shift register synchronous counter
This kind of synchronous working parts are best placed on the same plug-in board because the transmission delay time of the clock signals to different plug-in boards is not equal, which may cause the shift register to produce errors.
If they cannot be placed on the same board, the length of the clock line connected from the common clock source to each plug-in board must be equal where synchronization is critical. Consideration of four pairs of wiring. With the completion of the design of OTNI and star fiber optic network, there will be more boards with high-speed signal lines above 100MHz that need to be designed.
Here are some basic concepts of high-speed lines: Transmission line Any long signal path on the printed circuit board can be regarded as a transmission line. If the transmission delay time of the line is much shorter than the signal rise time, then the reflections generated during the signal rise will be submerged and no overshoot, rebound and ringing will be presented.
For most current MOS circuits, since the ratio of the rise time to the line transmission delay time is much larger, the routing can be measured in meters without signal distortion. For faster logic circuits, especially ultra-high-speed ECL integrated circuits, due to the increase in edge speed, if there are no other measures, the routing length must be greatly shortened to maintain signal integrity. There are two ways to make high-speed circuits. Working on relatively long lines without serious waveform distortion TTL uses Schottky diode clamping method for fast falling edges so that the overshoot is clamped at a level one diode voltage drop lower than the ground potential. This reduces the subsequent kickback amplitude. Slower rising edges allow overshoot, but it is attenuated by the relatively high output impedance 5080 of the circuit in the H state. In addition, due to the high noise immunity of the H state, the kickback problem is not very prominent. For HCT series devices, if Schottky diode clamping and series resistor termination methods are combined, the improvement effect will be more obvious.
When there is fan-out along the signal line, the TTL shaping method introduced above is somewhat insufficient at higher bit rates and faster edge rates because there are reflected waves in the line.
They will tend to be synthesized at high bit rates, causing serious signal distortion and reduced anti-interference ability. Therefore, in order to solve the reflection problem, another method is usually used in the ECL system. The line impedance matching method can control the reflection and ensure the integrity of the signal. Strictly speaking, transmission lines are not very necessary for conventional TTL and CMOS devices with slower edge speeds. Transmission lines are not always needed for high-speed ECL devices with faster edge speeds, but when they are used, they have the advantages of predicting connection delays and controlling reflections and oscillations through impedance matching:
- There are five basic factors that determine whether to use transmission lines. They are: 1. The edge rate of the system signal
- Connection distance 3. Capacitive load (how much fan-out)
- Resistive load 5. Termination method of the line 5. Permissible backlash and overshoot percentage 2. Reduction in AC immunity 2. Several types of transmission lines
(1) Coaxial cable and twisted pair They are often used to connect systems to each other. The characteristic impedance of coaxial cable is usually 50 and 75. The twisted pair is usually 1102. Microstrip line on the printed circuit board Microstrip line is a strip conductor (signal line) separated from the ground plane by a dielectric. If the thickness, width and distance of the line from the ground plane are controllable, its characteristic impedance can also be controlled. The characteristic impedance Z0 of the microstrip line is where Er is the relative dielectric constant of the printed circuit board dielectric material.
4.W is the thickness of the dielectric layer, t is the thickness of the line, and the transmission delay time of the microstrip line per unit length depends only on the dielectric constant and has nothing to do with the width or spacing of the line.
The main advantages of parallel termination wiring are fast system speed and complete and distortion-free signal transmission on the line. The load on the long line will neither affect the transmission delay time of the drive gate driving the long line nor its signal edge speed, but will increase the transmission delay time of the signal along the long line. When driving a large fan-out, the load can be distributed along the line through branch short lines, instead of having to lump the load at the end of the line as in the series termination. The series termination method enables the circuit to drive several parallel load lines. The delay time increment caused by the capacitive load is about twice that of the corresponding parallel termination wiring, while the short line slows down the edge speed and increases the drive gate delay time due to the capacitive load. However, the crosstalk of the series termination wiring is smaller than that of the parallel termination wiring. The main reason is the signal amplitude transmitted along the series termination wiring.
It is only half of the logic swing, so the switch current is only half of the switch current of the parallel termination. The signal energy is small and the crosstalk is small. The wiring technology of the second PCB board. Whether to use a double-sided board or a multi-layer board when making a PCB depends on the highest operating frequency, the complexity of the circuit system, and the requirements for assembly density. When the clock frequency exceeds 200MHZ, it is best to use a multi-layer board. If the operating frequency exceeds 350MHz, it is best to use a printed circuit board with polytetrafluoroethylene as the dielectric layer. Because its high-frequency attenuation is smaller, the parasitic capacitance is smaller, the transmission speed is faster, and because Z0 is larger, it saves power consumption.
The following principles are required for the routing of the printed circuit board:
1. All parallel signal lines should be kept as large as possible to reduce crosstalk. If there are two signal lines that are close to each other, it is best to run a ground wire between the two lines, which can play a shielding role.
(2) When designing signal transmission lines, avoid sharp turns to prevent sudden changes in the characteristic impedance of the transmission line and reflection.
Try to design it into a uniform arc line with a certain size. The width of the printed line can be calculated according to the above formula for calculating the characteristic impedance of microstrip lines and strip lines. The characteristic impedance of the microstrip line on the printed circuit board is generally between 50 and 120. To obtain a large characteristic impedance line width, it must be made very narrow, but very thin lines are not easy to make. Considering various factors, it is generally appropriate to choose an impedance value of about 68, because choosing a characteristic impedance of 68 can achieve the best balance between delay time and power consumption. A 50 transmission line will consume more power. A larger impedance can reduce power consumption, but it will increase the transmission delay time.
The negative line capacitance will increase the transmission delay time and reduce the characteristic impedance, but the intrinsic capacitance per unit length of the line segment with very low characteristic impedance is relatively large, so the transmission delay time and characteristic impedance are less affected by the load capacitance. An important feature of a properly terminated transmission line is that the branch short line should have no effect on the line delay time. When Z0 is 50, the length of the branch short line must be limited to 25cm to avoid large ringing.
- For double-sided boards or four-layer lines in six-layer boards, the lines on both sides of the circuit board should be perpendicular to each other to prevent mutual induction and crosstalk.
- If there are high-current devices such as relays, indicator lights, and speakers on the printed circuit board, their ground lines should be separated and routed separately to reduce noise on the ground lines. The ground lines of these high-current devices should be connected to an independent ground bus on the plug-in board and the backplane, and these independent ground lines should also be connected to the ground point of the entire system.
