PCB laminate design,PCB laminate design collection
PCB laminate design,PCB laminate design collection
In general, the stack design mainly follows two rules:
1. Each trace layer must have an adjacent reference layer (power or ground plane);
2. The adjacent main power plane and ground plane should be kept at a minimum spacing to provide a large coupling capacitance;
listed below from the two-layer board To the stack of ten layers:
1. Lamination of single-sided PCB board and double-sided PCB board
For two-layer boards, there is no problem of lamination due to the small number of layers. Controlling EMI radiation is primarily considered from wiring and layout;
The electromagnetic compatibility problems of single-layer boards and double-layer boards are becoming more and more prominent.
The main reason for this phenomenon is that the signal loop area is too large,
which not only produces strong electromagnetic radiation, but also makes the circuit sensitive to external interference. The easiest way to improve the electromagnetic compatibility of the line is to reduce the loop area of the critical signal.
Key signals:
From the perspective of electromagnetic compatibility,
the key signals mainly refer to signals that generate stronger radiation and signals that are sensitive to the outside world.
A signal capable of generating stronger radiation is typically a periodic signal,
such as a low signal of a clock or address.
Interference-sensitive signals are those with lower levels.
Single and double layer boards are typically used in low frequency analog designs below 10 kHz:
1 The power supply traces on the same layer are routed in a radial manner and minimize the sum of the lengths of the lines.
2 When the power supply and ground lines are connected, they are close to each other;
a ground wire is placed on the edge of the key signal line.
This ground line should be as far as possible. Close to the signal line.
This creates a smaller loop area and reduces the sensitivity of differential mode radiation to external disturbances.
When a ground wire is added next to the signal line, a loop with the smallest area is formed, and the signal current will definitely take this loop instead of other ground paths.
3 If it is a two-layer circuit board, you can lay a ground wire along the signal line on the other side of the circuit board,
close to the signal line, and the line should be as wide as possible.
The loop area thus formed is equal to the thickness of the board multiplied by the length of the signal line.
Second, four-layer laminate
Recommended stacking method:
1. SIG-GND(PWR)-PWR(GND)-SIG;
2. GND-SIG(PWR)-SIG(PWR)-GND;
For the above two laminate designs, the potential problem is for a conventional 1.6 mm (62 mil) plate thickness.
The layer spacing will become very large,
which is not only unfavorable for controlling impedance,
interlayer coupling and shielding; in particular,
the spacing between power supply layers is large,
which reduces the board capacitance and is not conducive to filtering noise.
For the first solution,it is usually applied to the case of more chips on the board.
This solution can get better SI performance, not very good for EMI performance,
mainly through routing and other details.
Main note: The stratum is placed in the connected layer of the signal layer with the densest signal,
which is beneficial to absorb and suppress radiation; increase the plate area and reflect the 20H rule.
For the second solution,
it is usually applied to a case where the chip density on the board is sufficiently low and there is a sufficient area around the chip (the required copper layer of the power supply is placed).
In this solution, the outer layers of the PCB are all layers, and the middle two layers are signal/power layers.
The power supply on the signal layer is routed with a wide line, which makes the path impedance of the power supply current low, and the impedance of the signal microstrip path is low, and the inner layer signal radiation can also be shielded through the outer layer.
From the perspective of EMI control, this is the best 4-layer PCB structure available.
The main note: the middle two layers of signals, the power supply mixed layer spacing should be opened,
the routing direction is vertical, to avoid crosstalk; the appropriate control board area, reflecting the 20H rule;
if you want to control the trace impedance, the above scheme must be very careful to trace Placed under the power and ground copper islands.

4 layers HDI PCB stack up
In addition, the copper between the power supply or the ground plane should be interconnected as much as possible to ensure DC and low frequency connectivity.
Lamination of three or six layers
1. For designs with high chip density and high clock frequency,
the design of 6-layer board should be considered.
Recommended stacking method:
1.SIG-GND-SIG-PWR-GND-SIG;
For this scheme, the stacking scheme can obtain better signal integrity,
the signal layer is adjacent to the ground plane, the power layer and the ground layer are paired,
and the impedance of each trace layer can be well controlled, and two The formation is a good absorption line of magnetic force.
And in the case of complete power and ground conditions, it can provide a better return path for each signal layer.
2. GND-SIG-GND-PWR-SIG -GND;
For this solution, this solution is only suitable for the case where the device density is not very high.
This laminate has all the advantages of the above laminate,
and the ground plane of the top layer and the bottom layer is relatively complete,
and can be used as a better shielding layer.
To use. It should be noted that the power plane should be close to the layer of the non-primary component surface
because the underlying plane will be more complete.
Therefore, EMI performance is better than the first option.
Summary:
For the six-layer board solution, the spacing between the power layer and the ground plane should be minimized to obtain good power and ground coupling. However, although the plate thickness of 62 mils is reduced, it is not easy to control the distance between the main power source and the ground layer to be small. Comparing the first scheme with the second scheme, the cost of the second scheme is greatly increased.
Therefore, we usually choose the first option when we stack.
Designed to follow the 20H rules and mirror layer rules
Stack of four or eight layers
Eight-layer boards usually use the following three stacking methods.
A: This is not a good lamination method due to poor electromagnetic absorption capability and large power supply impedance.
Its structure is as follows:
1.Signal 1 component surface, microstrip trace layer
2.Signal 2 internal microstrip trace layer, better trace layer (X direction)
3.Ground
4.Signal 3 Stripline trace layer , better trace layer (Y direction)
5.Signal 4 stripline trace layer
6.Power
7.Signal 5 internal microstrip trace layer
8.Signal 6 microstrip trace layer
B: It is a variant of the third stacking method.
Due to the addition of the reference layer and better EMI performance,
the characteristic impedance of each signal layer can be well controlled.
1.Signal 1 component surface, microstrip trace layer, good trace layer
2.Ground formation, good electromagnetic wave absorption capacity
3.Signal 2 stripline trace layer, good trace layer
4.Power power layer , and the following ground layer constitutes excellent electromagnetic absorption
5.Ground stratum 6.Signal 3 stripline trace layer, good trace layer
7.Power stratum, with large power supply impedance
8.Signal 4 microstrip trace layer Good routing layer
C: Optimal lamination mode, which has very good geomagnetic absorption capability due to the use of a multilayer reference plane.
1.Signal 1 component surface, microstrip trace layer, good trace layer
2.Ground formation, good electromagnetic wave absorption capacity
3.Signal 2 stripline trace layer, good trace layer
4.Power power layer , and the following ground layer constitutes excellent electromagnetic absorption
5.Ground stratum 6.Signal 3 stripline trace layer, good trace layer
7.Ground stratum, better electromagnetic wave absorption capacity
8.Signal 4 microstrip trace layer Good routing layer
How to choose how to design several layers and how to laminate it depends on the number of signal networks on the board, device density, PIN density, signal frequency, board size and many other factors. We must consider these factors comprehensively.
The greater the number of signal networks, the greater the density of the device, the greater the PIN density,
and the higher the frequency of the signal, the design should be as multi-layered as possible.
For good EMI performance, it is best to ensure that each signal layer has its own reference layer.








