Characteristic Impedance in PCB Design
Everyone knows that impedance should be continuous. There are always times when impedance cannot be continuous in PCB design. What should I do?
Characteristic impedance: also known as “characteristic impedance”, it is not a DC resistance, but a concept in long-line transmission. In the high-frequency range, during signal transmission, when the signal reaches the place, a transient current will be generated between the signal line and the reference plane (power supply or ground plane) due to the establishment of an electric field.
If the transmission line is isotropic, then as long as the signal is transmitted, there will always be a current I, and if the output voltage of the signal is V, during the signal transmission process, the transmission line will be equivalent to a resistor with a size of V/I. This equivalent resistor is called the characteristic impedance Z of the transmission line.
During the transmission of the signal, if the characteristic impedance on the transmission path changes, the signal will be reflected at the node where the impedance is discontinuous.
Factors affecting the characteristic impedance are: dielectric constant, dielectric thickness, line width, and copper foil thickness.
【1】 Gradient line
Some RF devices have small packages. The width of the SMD pad may be as small as 12 mils, while the width of the RF signal line may be more than 50 mils. Gradient lines should be used to prohibit sudden changes in line width. The gradient line is shown in the figure. The line in the transition part should not be too long.
【2】 Corner
If the RF signal line runs at a right angle, the effective line width at the corner will increase, the impedance will be discontinuous, and signal reflection will occur. In order to reduce the discontinuity, the corners must be processed. There are two methods: cutting the corners and rounding the corners. The radius of the arc angle should be large enough. Generally speaking, it is necessary to ensure that: R>3W. As shown in the right figure.
【3】 Large pad
When there is a large pad on a 50 ohm microstrip line, the large pad is equivalent to a distributed capacitor, which destroys the continuity of the characteristic impedance of the microstrip line. Two methods can be used to improve it at the same time: first, thicken the microstrip line dielectric, and second, hollow out the ground plane under the pad, both of which can reduce the distributed capacitance of the pad. As shown in the figure below.
【4】Via
A via is a metal cylinder plated outside the through hole between the top and bottom layers of the circuit board. Signal vias connect transmission lines on different layers. Via stubs are unused parts of vias. Via pads are annular pads that connect vias to top or internal transmission lines. Isolation pads are annular gaps within each power or ground layer to prevent short circuits to the power and ground layers.
Parasitic parameters of vias
After rigorous physical theory derivation and approximate analysis, the equivalent circuit model of a via can be modeled as an inductor with a ground capacitor connected in series at both ends, as shown in Figure 1.
Equivalent circuit model of vias
From the equivalent circuit model, it can be seen that the via itself has parasitic capacitance to the ground. Assuming that the diameter of the via anti-pad is D2, the diameter of the via pad is D1, the thickness of the PCB is T, and the dielectric constant of the board substrate is ε, the parasitic capacitance of the via is approximately:
The parasitic capacitance of the via can cause the signal rise time to be extended and the transmission speed to be slowed down, thereby deteriorating the signal quality. Similarly, vias also have parasitic inductance. In high-speed digital PCBs, the harm caused by parasitic inductance is often greater than parasitic capacitance.
Its parasitic series inductance will weaken the contribution of the bypass capacitor, thereby weakening the filtering effect of the entire power system. Assume that L is the inductance of the via, h is the length of the via, and d is the diameter of the center drill hole. The approximate parasitic inductance of the via is approximately:
The via is one of the important factors causing impedance discontinuity on the RF channel. If the signal frequency is greater than 1GHz, the influence of the via must be considered.
Common methods to reduce impedance discontinuity of vias include: using padless process, selecting wire outlet method, optimizing anti-pad diameter, etc. Optimizing anti-pad diameter is the most commonly used method to reduce impedance discontinuity. Since the characteristics of vias are related to structural dimensions such as aperture, pad, anti-pad, stacking structure, and wire outlet method, it is recommended to use HFSS and Optimetrics for optimization simulation according to specific circumstances each time you design.
When a parametric model is used, the modeling process is very simple. During the review, PCB designers are required to provide corresponding simulation documents.
The diameter, pad diameter, depth, and anti-pad of the via will all bring changes, causing impedance discontinuity, reflection, and insertion loss severity.
[5] Through-hole coaxial connector
Similar to the via structure, through-hole coaxial connectors also have impedance discontinuity, so the solution is the same as that of vias. Common methods to reduce impedance discontinuity of through-hole coaxial connectors are also: using padless process, appropriate wire outlet method, and optimizing anti-pad diameter.
