Ten questions and answers about ultra-practical high-frequency PCB circuit design

1.How to choose PCB proofing material?

The selection of PCB material must strike a balance between meeting design requirements and mass production and cost. Usually, when designing very high-speed PCB boards, the material problem is more important. For example, the dielectric loss of the commonly used FR-4 material at a frequency of several GHz will have a great impact on signal attenuation, and it may not be suitable. In terms of electricity, it is necessary to pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency.

2.How to avoid high-frequency interference?

The basic idea of ​​avoiding high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is also called crosstalk. You can increase the distance between high-speed signals and analog signals, or add ground guard/shunt traces next to analog signals. Also pay attention to the noise interference of digital ground to analog ground.

3.How to solve the signal integrity problem in high-speed design?

Signal integrity is basically an impedance matching problem. The factors that affect impedance matching include the architecture and output impedance of the signal source, the characteristic impedance of the trace, the characteristics of the load end, and the topological architecture of the trace. The solution is to rely on termination and adjust the topology of the routing.

4.How is differential routing implemented?

There are two points to note for differential routing. One is that the lengths of the two lines should be as equal as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should remain unchanged, that is, they should remain parallel. There are two ways to be parallel, one is that the two lines are on the same routing layer, and the other is that the two lines are on the upper and lower adjacent layers. Generally, the former is more often implemented.

5.For a clock signal line with only one output end, how to implement differential routing?

It is meaningful to use differential routing only when the signal source and the receiving end are both differential signals, so differential routing cannot be used for clock signals with only one output end.

6.Can a matching resistor be added between the differential line pairs at the receiving end?

The matching resistor between the differential line pairs at the receiving end is usually added, and its value should be equal to the value of the differential impedance, so that the signal quality will be better.

7.Why should the wiring of differential pairs be close and parallel?

The wiring method of differential pairs should be appropriately close and parallel. The so-called appropriate proximity is because this spacing will affect the value of differential impedance, which is an important parameter for designing differential pairs. Parallelism is also required to maintain the consistency of differential impedance. If the two lines are sometimes far away and sometimes close, the differential impedance will be inconsistent, which will affect signal integrity and time delay.

8.How to deal with some theoretical conflicts in actual wiring?

Basically, it is right to separate and isolate the analog/digital ground. It should be noted that the signal routing should try not to cross the divided place, and the return current path of the power supply and signal should not be too large.

The crystal oscillator is an analog positive feedback oscillation circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. The oscillation specification of this analog signal is easily interfered. Even if ground guard traces are added, it may not be possible to completely isolate the interference. Moreover, if it is too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal oscillator and the chip must be as close as possible.

It is true that there are many conflicts between high-speed wiring and EMI requirements. But the basic principle is that the resistors, capacitors or ferrite beads added due to EMI cannot cause some electrical characteristics of the signal to not meet the specifications. Therefore, it is best to first use the techniques of arranging routing and PCB stacking to solve or reduce EMI problems, such as routing high-speed signals on the inner layer. Finally, use resistors, capacitors or ferrite beads to reduce damage to the signal.

9.How to solve the contradiction between manual routing and automatic routing of high-speed signals?

Most of the current powerful routing software’s automatic routing tools have set constraints to control the winding method and the number of vias. The winding engine capabilities and constraint setting items of various EDA companies are sometimes very different.

For example, whether there are enough constraints to control the winding method of the serpentine line, whether the routing spacing of the differential pair can be controlled, etc. This will affect whether the routing method generated by automatic routing can meet the designer’s ideas.

In addition, the difficulty of manually adjusting the routing is also absolutely related to the ability of the winding engine. For example, the pushing ability of the routing, the pushing ability of the via, and even the pushing ability of the routing to the copper plating, etc. Therefore, choosing a routing tool with a strong winding engine capability is the solution.

10.In high-speed PCB design, the blank area of ​​the signal layer can be copper-plated. How should the copper-plated areas of multiple signal layers be distributed for grounding and power supply?

Generally, the copper-plated areas in the blank areas are mostly grounded. However, when copper-plating next to high-speed signal lines, attention should be paid to the distance between the copper-plated areas and the signal lines, because the copper-plated areas will reduce the characteristic impedance of the traces. Also, care should be taken not to affect the characteristic impedance of other layers.