70 High-frequency PCB Circuit Design Questions

1.How to choose PCB material?

The selection of PCB material must strike a balance between meeting design requirements and mass production and cost. Design requirements include electrical and mechanical parts. Usually, this material issue is more important when designing very high-speed PCB boards (frequencies greater than GHz).

For example, the dielectric loss of the commonly used FR-4 material at a frequency of several GHz will have a great impact on signal attenuation and may not be suitable. In terms of electrical, it is necessary to pay attention to whether the dielectric constant and dielectric loss are suitable for the designed frequency.

2.How to avoid high-frequency interference?

The basic idea of ​​avoiding high-frequency interference is to minimize the interference of the electromagnetic field of high-frequency signals, which is also called crosstalk. You can increase the distance between high-speed signals and analog signals, or add ground guard/shunt traces next to analog signals. Also pay attention to the noise interference of digital ground to analog ground.

3.In high-speed design, how to solve the signal integrity problem?

Signal integrity is basically an impedance matching problem. The factors that affect impedance matching include the architecture and output impedance of the signal source, the characteristic impedance of the trace, the characteristics of the load end, and the topology of the trace. The solution is to rely on termination and adjust the topology of the trace.

4.How is the differential wiring method implemented?

There are two points to note when routing differential pairs. One is that the lengths of the two lines should be as equal as possible, and the other is that the spacing between the two lines (this spacing is determined by the differential impedance) should remain unchanged, that is, they should remain parallel. There are two parallel methods, one is that the two lines run on the same routing layer (side-by-side), and the other is that the two lines run on the upper and lower adjacent layers (over-under). Generally, the former side-by-side (side by side, shoulder to shoulder) is more commonly implemented.

5.How to implement differential wiring for clock signal lines with only one output end?

To use differential wiring, it must be that the signal source and the receiving end are also differential signals. Therefore, differential wiring cannot be used for clock signals with only one output end.

6.Can a matching resistor be added between the differential line pairs at the receiving end?

Matching resistors are usually added between the differential line pairs at the receiving end, and their values ​​should be equal to the value of the differential impedance. This will improve the signal quality.

7.Why should the differential pair be routed close and parallel?

The routing of the differential pair should be appropriately close and parallel. The so-called appropriate proximity is because this spacing will affect the value of the differential impedance, which is an important parameter for designing differential pairs. Parallel is also required because the consistency of the differential impedance must be maintained. If the two lines are sometimes far and sometimes close, the differential impedance will be inconsistent, which will affect the signal integrity and timing delay.

8.How to deal with some theoretical conflicts in actual wiring?

Basically, it is right to separate the analog/digital ground. It should be noted that the signal routing should try not to cross the split place (moat), and do not make the return current path of the power supply and signal too large.

The crystal oscillator is an analog positive feedback oscillation circuit. To have a stable oscillation signal, the loop gain and phase specifications must be met. However, the oscillation specifications of this analog signal are easily disturbed. Even if ground guard traces are added, it may not be possible to completely isolate the interference. Moreover, if they are too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. Therefore, the distance between the crystal oscillator and the chip must be as close as possible.

It is true that there are many conflicts between high-speed wiring and EMI requirements. But the basic principle is that the resistors, capacitors or ferrite beads added due to EMI cannot cause some electrical characteristics of the signal to be inconsistent with the specifications. Therefore, it is best to use the techniques of arranging routing and PCB stacking to solve or reduce EMI problems, such as high-speed signals on the inner layer. Finally, use resistors, capacitors or ferrite beads to reduce damage to the signal.

9.How to solve the contradiction between manual wiring and automatic wiring of high-speed signals?

Most of the automatic wiring tools of the current powerful wiring software have set constraints to control the winding method and the number of vias. The capabilities of the winding engines and the setting items of constraints of various EDA companies are sometimes very different.

For example, whether there are enough constraints to control the winding mode of the serpentine, whether the spacing of the differential pair can be controlled, etc. This will affect whether the routing method generated by automatic routing can meet the designer’s ideas.

In addition, the difficulty of manually adjusting the routing is absolutely related to the capabilities of the winding engine. For example, the pushing ability of the routing, the pushing ability of the vias, and even the pushing ability of the routing pair copper, etc. Therefore, choosing a router with strong winding engine capabilities is the solution.

10.About test coupons.

The test coupon is used to measure the characteristic impedance of the produced PCB board with TDR (Time Domain Reflectometer) to see if it meets the design requirements. Generally, the impedance to be controlled is single line and differential pair.

Therefore, the routing line width and line spacing (when there is a differential pair) on the test coupon should be the same as the line to be controlled. The most important thing is the position of the ground point during measurement.

In order to reduce the inductance of the ground lead, the grounding point of the TDR probe is usually very close to the probe tip. Therefore, the distance and method between the signal measurement point and the grounding point on the test coupon should be consistent with the probe used.

11.In high-speed PCB design, the blank area of ​​the signal layer can be copper-plated, and how should the copper of multiple signal layers be distributed for grounding and power supply?

Generally, the copper in the blank area is grounded in most cases. However, when copper is applied next to the high-speed signal line, attention should be paid to the distance between the copper and the signal line, because the copper applied will reduce the characteristic impedance of the trace. Also, be careful not to affect the characteristic impedance of other layers, such as in the dual strip line structure.

12.Can the characteristic impedance of the signal line on the power plane be calculated using the microstrip line model? Can the signal between the power and ground planes be calculated using the stripline model?

Yes, both the power plane and the ground plane must be regarded as reference planes when calculating the characteristic impedance. For example, a four-layer board: top layer-power layer-ground layer-bottom layer. At this time, the model of the characteristic impedance of the top layer routing is a microstrip line model with the power plane as the reference plane.

13.Can the automatic generation of test points by software on high-density printed circuit boards generally meet the test requirements of mass production?

Whether the test points automatically generated by general software meet the test requirements must be determined by whether the specifications for adding test points meet the requirements of the test equipment. In addition, if the routing is too dense and the specifications for adding test points are strict, it may not be possible to automatically add test points to each line. Of course, you need to manually fill in the places to be tested.

14.Will adding test points affect the quality of high-speed signals?

As for whether it will affect the signal quality, it depends on the way of adding test points and how fast the signal is. Basically, the additional test points (not using the existing vias (via or DIP pins) as test points) may be added to the line or a small line may be pulled out from the line.

The former is equivalent to adding a very small capacitor to the line, while the latter is an additional branch. Both of these situations will have some impact on high-speed signals, and the extent of the impact is related to the frequency speed of the signal and the edge rate of the signal. The magnitude of the impact can be learned through simulation. In principle, the smaller the test point, the better (of course, it must meet the requirements of the test equipment) and the shorter the branch, the better.

15.How should the ground wires between the boards of a system be connected?

When the signals or power supplies between the interconnected PCB boards are in action, for example, when the power supply or signal from board A is sent to board B, there must be an equal amount of current flowing back from the ground layer to board A (this is Kirchoff current law).

The current on the ground layer will flow back to the place with the lowest impedance. Therefore, at each interface where the power supply or signal is connected to each other, the number of pins allocated to the ground layer cannot be too small to reduce the impedance, which can reduce the noise on the ground layer.

In addition, the entire current loop can also be analyzed, especially the part with larger current, and the connection method of the ground layer or ground wire can be adjusted to control the flow of current (for example, create low impedance at a certain place to let most of the current flow from this place) to reduce the impact on other more sensitive signals.

16.Can you introduce some foreign technical books and data on high-speed PCB design?

At present, the application of high-speed digital circuits includes communication networks and calculators and other related fields. In the communication network, the operating frequency of PCB boards has reached around GHz, and the number of layers is as many as 40 layers as far as I know.

Due to the advancement of chips, the highest operating frequency on the board of calculator-related applications has reached 400MHz (such as Rambus) or above, whether it is a general PC or server.

In response to the demand for high-speed and high-density routing, the demand for blind/buried vias, mircrovias and build-up process technology is gradually increasing. These design requirements can be mass-produced by manufacturers.

17.Two commonly referenced characteristic impedance formulas:

Microstrip Z={87/[sqrt(Er+1.41)]}ln[5.98H/(0.8W+T)] Where W is the line width, T is the copper thickness of the trace, H is the distance from the trace to the reference plane, and Er is the dielectric constant of the PCB material. This formula can only be applied when 0.1<(W/H)<2.0 and 1<(Er)<15.

Stripline Z=[60/sqrt(Er)]ln{4H/[0.67π(T+0.8W)]} Where H is the distance between the two reference planes, and the trace is located in the middle of the two reference planes. This formula can only be applied when W/H<0.35 and T/H<0.25.

18.Can a ground wire be added in the middle of the differential signal line?

Generally, a ground wire cannot be added in the middle of the differential signal. Because the most important point of the application principle of differential signals is to utilize the benefits brought by the mutual coupling (coupling) between differential signals, such as flux cancellation, noise immunity, etc. If a ground wire is added in the middle, the coupling effect will be destroyed.

19.Does the design of rigid-flexible boards require special design software and specifications? Where can I undertake the processing of such circuit boards in China?

You can use the general PCB design software to design flexible printed circuits (Flexible Printed Circuit). The Gerber format is also used for FPC manufacturers to produce. Because the manufacturing process is different from that of general PCBs, each manufacturer will set the minimum line width, minimum line spacing, and minimum aperture (via) according to their manufacturing capabilities.

In addition, some copper foil can be laid at the turning point of the flexible circuit board for reinforcement. As for the manufacturer, you can search for “FPC” as a keyword on the Internet and you should be able to find it.

20.What is the principle of properly selecting the grounding point between the PCB and the shell?

The principle of selecting the grounding point of the PCB and the shell is to use the chassis ground to provide a low-impedance path for the returning current and control the path of this returning current.

For example, usually near high-frequency devices or clock generators, the ground layer of the PCB can be connected to the chassis ground by fixing screws to minimize the entire current loop area, thereby reducing electromagnetic radiation.

21.Which aspects should be considered for circuit board debugging?

For digital circuits, first determine three things in order:

1) Confirm that the size of all power supply values ​​meets the design requirements. Some systems with multiple power supplies may require certain specifications for the order and speed of certain power supplies.

2) Confirm that all clock signal frequencies are working properly and there is no non-monotonic problem on the signal edge.

3) Confirm whether the reset signal meets the specification requirements.

If all these are normal, the chip should send the first cycle signal. Next, debug according to the system operation principle and bus protocol.

22.If the size of the circuit board is fixed, if the design needs to accommodate more functions, it is often necessary to increase the routing density of the PCB. However, this may lead to increased mutual interference between the routings, and the impedance cannot be reduced if the routing is too thin. Please introduce the techniques in the design of high-speed (>100MHz) high-density PCBs?

When designing high-speed and high-density PCBs, crosstalk interference is indeed something that needs special attention, because it has a great impact on timing and signal integrity. Here are a few points to note:

1) Control the continuity and matching of the routing characteristic impedance.

The size of the routing spacing. The spacing commonly seen is twice the line width. The impact of the routing spacing on timing and signal integrity can be understood through simulation, and the minimum tolerable spacing can be found. The results of different chip signals may be different.

2) Choose the appropriate termination method.

Avoid the same routing direction of the upper and lower adjacent layers, or even have the routing overlapped up and down, because this crosstalk is greater than the situation of adjacent routing on the same layer.

Use blind/buried vias to increase the trace area. However, the production cost of the PCB board will increase. In actual implementation, it is indeed difficult to achieve complete parallelism and equal length, but we should try our best to do so.

In addition, differential termination and common mode termination can be reserved to ease theand the impact on timing and signal integrity.

23.LC circuits are often used for filtering at analog power supplies. But why is LC sometimes less effective than RC filtering?

The comparison of LC and RC filtering effects must consider whether the frequency band to be filtered and the selection of inductance value are appropriate. Because the reactance of the inductor is related to the inductance value and frequency. If the noise frequency of the power supply is low and the inductance value is not large enough, the filtering effect may not be as good as RC.

However, the price to pay for using RC filtering is that the resistor itself will consume energy and have poor efficiency, and attention should be paid to the power that the selected resistor can withstand.

24.What is the method for selecting inductance and capacitance values ​​when filtering?

In addition to considering the noise frequency to be filtered, the selection of inductance value must also consider the response ability of instantaneous current. If the output end of LC has the opportunity to output a large current instantly, a large inductance value will hinder the speed at which this large current flows through this inductor and increase ripple noise.

The capacitance value is related to the size of the tolerable ripple noise specification value. The smaller the ripple noise value requirement, the larger the capacitance value will be. The ESR/ESL of the capacitor will also have an impact.

In addition, if this LC is placed at the output end of the switching regulation power supply, it is also necessary to pay attention to the influence of the pole/zero generated by this LC on the stability of the negative feedback control loop.

25.How to meet EMC requirements as much as possible without causing too much cost pressure?

The cost increase on the PCB board due to EMC is usually due to the increase in the number of ground layers to enhance the shielding effect and the addition of ferrite beads, chokes and other high-frequency harmonic suppression devices.

In addition, it is usually necessary to match the shielding structure on other mechanisms to make the entire system pass the EMC requirements. The following only provides a few design tips for PCB boards to reduce the electromagnetic radiation effect generated by the circuit.

Try to use devices with slower signal slope (slew rate) to reduce the high-frequency components generated by the signal.

Pay attention to the placement of high-frequency devices, and do not place them too close to external connectors.

Pay attention to the impedance matching of high-speed signals, the routing layer and its return current path to reduce high-frequency reflection and radiation.

Place enough and appropriate decoupling capacitors at the power pins of each device to mitigate the noise on the power layer and the ground layer. Pay special attention to whether the frequency response and temperature characteristics of the capacitor meet the design requirements.

The ground near the external connector can be properly separated from the ground layer, and the ground of the connector can be connected to the chassis ground as close as possible.

Ground guard/shunt traces can be appropriately used next to some particularly high-speed signals. But pay attention to the impact of guard/shunt traces on the characteristic impedance of the routing.

The power layer is 20H smaller than the ground layer, and H is the distance between the power layer and the ground layer.

26.When there are multiple digital/analog functional blocks on a PCB board, the conventional practice is to separate the digital/analog ground. Why?

The reason for separating the digital/analog ground is that the digital circuit will generate noise in the power supply and ground when switching between high and low potentials. The size of the noise is related to the speed of the signal and the size of the current.

If the ground plane is not divided and the noise generated by the digital area circuit is large and the analog area circuit is very close, even if the digital and analog signals do not cross, the analog signal will still be interfered by the ground noise. That is to say, the method of not dividing the digital and analog ground can only be used when the analog circuit area is far away from the digital circuit area that generates large noise.

27.Another approach is to ensure that the digital/analog layout is separated and the digital/analog signal lines do not cross each other, and the entire PCB board ground is not divided, and the digital/analog ground is connected to this ground plane. What’s the reason?

The requirement that the digital and analog signal lines cannot cross is because the return current path of the slightly faster digital signal will try to flow back to the source of the digital signal along the ground near the bottom of the line. If the digital and analog signal lines cross, the noise generated by the return current will appear in the analog circuit area.

28.When designing the schematic diagram of high-speed PCB design, how to consider the impedance matching problem?

When designing high-speed PCB circuits, impedance matching is one of the design elements. The impedance value is absolutely related to the routing method. For example, whether it is on the surface layer (microstrip) or the inner layer (stripline/double stripline), the distance from the reference layer (power layer or ground layer), the routing width, the PCB material, etc. will affect the characteristic impedance value of the routing.

In other words, the impedance value can only be determined after routing. General simulation software cannot take into account some impedance discontinuous routing conditions due to the circuit model or the mathematical algorithm used. At this time, only some terminators (terminations), such as series resistors, can be reserved on the schematic diagram to alleviate the effect of impedance discontinuity. The real fundamental solution to the problem is to try to avoid impedance discontinuity during routing.

29.Where can I provide a more accurate IBIS model library?

The accuracy of the IBIS model directly affects the simulation results. Basically, IBIS can be regarded as the electrical characteristic data of the equivalent circuit of the actual chip I/O buffer, which can generally be converted from the SPICE model. The SPICE data is absolutely related to chip manufacturing, so the same device provided by different chip manufacturers has different SPICE data, and the data in the converted IBIS model will also vary accordingly.

In other words, if the device of manufacturer A is used, only they are able to provide accurate model data of their device, because no one else knows better than them what process their device is made of. If the IBIS provided by the manufacturer is inaccurate, the only fundamental solution is to constantly ask the manufacturer to improve.

30.In high-speed PCB design, from which aspects should designers consider EMC and EMI rules?

Generally, EMI/EMC design needs to consider both radiation (radiated) and conduction (conducted). The former belongs to the higher frequency part (>30MHz) and the latter is the lower frequency part (<30MHz). So you can’t only pay attention to the high frequency and ignore the low frequency part.

A good EMI/EMC design must consider the location of the device, the arrangement of the PCB stack, the routing of important connections, the selection of devices, etc. at the beginning of the layout. If these are not arranged in advance, the solution afterwards will be counterproductive and increase costs.

For example, the location of the clock generator should not be close to the external connector as much as possible, the high-speed signal should be routed on the inner layer as much as possible and pay attention to the characteristic impedance matching and the continuity of the reference layer to reduce reflection, the slew rate of the signal pushed by the device should be as small as possible to reduce the high-frequency component, and when selecting the decoupling (decoupling/bypass) capacitor, pay attention to whether its frequency response meets the requirements to reduce the power layer noise.

In addition, pay attention to the return path of the high-frequency signal current to make its loop area as small as possible (that is, the loop impedance is as small as possible) to reduce radiation. You can also use the method of splitting the ground layer to control the range of high-frequency noise. Finally, choose the ground point (chassis ground) of the PCB and the shell appropriately.

31.How to choose EDA tools?

Thermal analysis is not a strong point in the current PCB design software, so it is not recommended to use it. For other functions 1.3.4, you can choose PADS or Cadence, which have good performance-price ratio.

Beginners in PLD design can use the integrated environment provided by PLD chip manufacturers, and single-point tools can be used when designing more than one million gates.

32.Please recommend an EDA software suitable for high-speed signal processing and transmission.

For conventional circuit design, INNOVEDA’s pads are very good, and there are simulation software for matching, and this type of design often occupies 70% of the application occasions.

When doing high-speed circuit design, analog and digital mixed circuits, the solution using Cadence should be a software with better performance and price. Of course, Mentor’s performance is still very good, especially its design process management should be the best.

33.Explanation of the meaning of each layer of the PCB board:

Topoverlay —- the name of the top-level device, also called top silkscreen or top component legend, such as R1 C5, IC10.bottomoverlay—-similarly multilayer—–if you design a 4-layer board, you place a free pad or via, define it as multilay, then its pad will automatically appear on the 4 layers. If you only define it as the top layer, then its pad will only appear on the top layer.

34.What aspects should be paid attention to in the design, routing, and layout of high-frequency PCBs above 2G?

High-frequency PCBs above 2G belong to RF circuit design and are not within the scope of discussion of high-speed digital circuit design. The layout and routing of RF circuits should be considered together with the schematic diagram, because layout and routing will cause distribution effects.

Moreover, some passive devices in RF circuit design are realized through parameterized definition and special-shaped copper foil, so EDA tools are required to provide parameterized devices and edit special-shaped copper foil. Mentor’s boardstation has a dedicated RF design module that can meet these requirements. In addition, general RF design requires a dedicated RF circuit analysis tool. The most famous one in the industry is Agilent’s EEsoft, which has a good interface with Mentor’s tools.

35.What rules should be followed for microstrip design in high-frequency PCB design above 2G?

RF microstrip line design requires the use of a three-dimensional field analysis tool to extract transmission line parameters. All rules should be specified in this field extraction tool.

36.For a fully digital signal PCB, there is an 80MHz clock source on the board. In addition to using silk screen (grounding), what kind of circuit should be used for protection in order to ensure sufficient driving capability?

To ensure the driving capability of the clock, it should not be achieved through protection, and a clock driver chip is generally used. Generally, the concern about the clock driving capability is caused by multiple clock loads. Using a clock driver chip, one clock signal is converted into several, using point-to-point connection.

When selecting a driver chip, in addition to ensuring that it is basically matched with the load and that the signal edge meets the requirements (generally the clock is an edge-valid signal), the clock delay in the driver chip should be taken into account when calculating the system timing.

37.If a separate clock signal board is used, what kind of interface is generally used to ensure that the transmission of the clock signal is less affected?

The shorter the clock signal, the smaller the transmission line effect. Using a separate clock signal board will increase the signal wiring length. And the grounding and power supply of the single board is also a problem. If you want to transmit over a long distance, it is recommended to use a differential signal. LVDS signals can meet the driving capability requirements, but your clock is not too fast, so it is not necessary.

38.27M, SDRAM clock lines (80M-90M), the second and third harmonics of these clock lines are just in the VHF band, and the interference is very large after the high frequency from the receiving end. In addition to shortening the line length, what other good ways are there?

If the third harmonic is large and the second harmonic is small, it may be because the signal duty cycle is 50%, because in this case, the signal has no even harmonics. At this time, the signal duty cycle needs to be modified. In addition, for unidirectional clock signals, source-end series matching is generally used.

This can suppress secondary reflections, but will not affect the clock edge rate. The source-end matching value can be obtained using the formula in the figure below.

39.What is the topology of routing?

Topology, also called routing order. The wiring order for a network with multiple ports connected.

40.How to adjust the topology of routing to improve signal integrity?

The signal direction of this network is relatively complex, because the topology has different effects on unidirectional, bidirectional signals, and signals of different levels. It is difficult to say which topology is beneficial to signal quality. Moreover, when doing pre-simulation, the topology used is very demanding for engineers, requiring them to understand the circuit principles, signal types, and even routing difficulties.

41.How to reduce EMI problems by arranging stacking?

First of all, EMI should be considered from the system, and PCB alone cannot solve the problem. For EMI, I think the stacking is mainly to provide the shortest return path for the signal, reduce the coupling area, and suppress differential mode interference. In addition, the ground layer is tightly coupled with the power layer, and the extension is appropriately larger than the power layer, which is beneficial for suppressing common-mode interference.

42.Why do we need to lay copper?

There are generally several reasons for copper.

1) EMC. For large-area ground or power copper, it will play a shielding role, and some special grounds, such as PGND, play a protective role.

2) PCB process requirements. Generally, in order to ensure the electroplating effect or prevent the lamination from deformation, copper is laid on PCB layers with less wiring.

3) Signal integrity requirements, give high-frequency digital signals a complete return path, and reduce the wiring of the DC network. Of course, there are also heat dissipation, special device installation requires copper laying and other reasons.

43.In a system, dsp and pld are included. What issues should be paid attention to when wiring?

Look at the ratio of your signal rate to wiring length. If the delay of the signal in the transmission line is comparable to the time along the signal change, the signal integrity issue should be considered.

In addition, for multiple DSPs, clocks, and data signal routing topology will also affect signal quality and timing, which requires attention.

44.In addition to protel tool wiring, are there other good tools?

As for tools, in addition to PROTEL, there are many wiring tools, such as MENTOR’s WG2000, EN2000 series and powerpcb, Cadence’s allegro, Zuken’s cadstar, cr5000, etc., each with its own strengths.

45.What is the “signal return path”?

The signal return path is the return current. When high-speed digital signals are transmitted, the signal flows from the driver along the PCB transmission line to the negative

The load then returns to the driver end along the ground or power supply through the shortest path.

This return signal on the ground or power supply is called the signal return path. Dr.Johson explained in his book that high-frequency signal transmission is actually the process of charging the dielectric capacitor sandwiched between the transmission line and the DC layer. SI analysis is the electromagnetic characteristics of this enclosure and the coupling between them.

46.How to perform SI analysis on the plug-in?

In the IBIS3.2 specification, there is a description of the connector model. Generally, the EBD model is used. If it is a special board, such as a backplane, a SPICE model is required.

You can also use multi-board simulation software (HYPERLYNX or IS_multiboard). When establishing a multi-board system, enter the distributed parameters of the connector, which are generally obtained from the connector manual. Of course, this method will not be accurate enough, but as long as it is within an acceptable range.

47.What are the termination methods?

Termination (terminal), also known as matching. Generally, there are active end matching and terminal matching according to the matching position. Among them, source end matching is generally resistor series matching, and terminal matching is generally parallel matching. There are many ways, including resistor pull-up, resistor pull-down, Thevenin matching, AC matching, and Schottky diode matching.

48.What factors determine the termination (matching) method?

The matching method is generally determined by the BUFFER characteristics, topology, level type and judgment method, and the signal duty cycle, system power consumption, etc. should also be considered.

49.What are the rules for using termination (matching)?

The most critical issue in digital circuits is timing. The purpose of adding matching is to improve signal quality and obtain a certain signal at the moment of judgment. For level-valid signals, the signal quality is stable under the premise of ensuring the establishment and holding time; for delay-valid signals, the signal change delay speed meets the requirements under the premise of ensuring the monotonicity of the signal delay.

There are some materials about matching in the Mentor ICX product textbook. In addition, “High Speed ​​Digital Design a Hand Book of Blackmagic” has a chapter dedicated to the description of terminal, which describes the role of matching on signal integrity from the principle of electromagnetic waves, which can be used for reference.

50.Can the IBIS model of the device be used to simulate the logical function of the device? If not, how to simulate the circuit board level and system level?

IBIS model is a behavioral model and cannot be used for functional simulation. Functional simulation requires SPICE model or other structural level model.

51. In a system where digital and analog coexist, there are two processing methods. One is to separate the digital ground and the analog ground. For example, in the ground layer, the digital ground is an independent piece, the analog ground is an independent piece, and the single point is connected with copper foil or FB magnetic beads, while the power supply is not separated; the other is to separate the analog power supply and the digital power supply with FB connection, and the ground is a unified ground. Do these two methods have the same effect?

It should be said that in principle, it is the same. Because the power supply and ground are equivalent to high-frequency signals.

The purpose of distinguishing between analog and digital parts is to resist interference, mainly the interference of digital circuits on analog circuits. However, the division may cause incomplete signal return path, affect the signal quality of digital signals, and affect the system EMC quality.

Therefore, no matter which plane is divided, it depends on whether the signal return path is enlarged and how much the return signal interferes with the normal working signal. There are also some hybrid designs now, which do not distinguish between power supply and ground. When laying out, the layout is separated according to the digital part and the analog part to avoid cross-zone signals.

52.Safety issues: What are the specific meanings of FCC and EMC?

FCC: Federal Communications Commission

EMC: Electro Magnetic Compatibility

FCC is a standards organization, and EMC is a standard. There are corresponding reasons, standards and test methods for the promulgation of standards.

53.What is differential wiring?

Differential signals, also called differential signals, use two completely identical signals with opposite polarities to transmit one data path, and rely on the difference in the level of the two signals for judgment. In order to ensure that the two signals are completely consistent, they must be kept parallel during wiring, and the line width and line spacing remain unchanged.

54.What are the PCB simulation software?

There are many types of simulation. Commonly used software for high-speed digital circuit signal integrity analysis simulation analysis (SI) include icx, signalvision, hyperlynx, XTK, speectraquest, etc. Some also use Hspice.

55.How does PCB simulation software perform LAYOUT simulation?

In high-speed digital circuits, in order to improve signal quality and reduce wiring difficulty, multi-layer boards are generally used, and special power layers and ground layers are allocated.

56.How to deal with the stability of signals above 50M in layout and wiring?

The key to high-speed digital signal wiring is to reduce the impact of transmission lines on signal quality. Therefore, when laying out high-speed signals above 100M, the signal routing is required to be as short as possible. In digital circuits, high-speed signals are defined by signal rise delay time.

Moreover, different types of signals (such as TTL, GTL, LVTTL) have different methods to ensure signal quality.

57.The RF part, IF part, and even the low-frequency circuit part of the outdoor unit are often deployed on the same PCB. What are the material requirements for such PCB? How to prevent interference between RF, IF and even low-frequency circuits?

Hybrid circuit design is a big problem. It is difficult to have a perfect solution.

Generally, RF circuits are laid out and wired as an independent single board in the system, and there will even be a special shielding cavity. Moreover, RF circuits are generally single-sided or double-sided boards, and the circuits are relatively simple. All of these are to reduce the impact on the distributed parameters of RF circuits and improve the consistency of RF systems.

Compared with general FR4 materials, RF circuit boards tend to use high-Q substrates. The dielectric constant of this material is relatively small, the distributed capacitance of the transmission line is small, the impedance is high, and the signal transmission delay is small. In hybrid circuit design, although RF and digital circuits are made on the same PCB, they are generally divided into RF circuit area and digital circuit area, and laid out and wired separately. Shielding is used between ground vias and shielding boxes.

58.For the RF part, the intermediate frequency part and the low frequency circuit part are deployed on the same PCB. What solutions does Mentor have?

In addition to the basic circuit design functions, Mentor’s board-level system design software also has a dedicated RF design module.

In the RF schematic design module, parameterized device models are provided, and a two-way interface with RF circuit analysis and simulation tools such as EESOFT is provided; in the RF LAYOUT module, a pattern editing function specifically used for RF circuit layout and routing is provided, and there is also a two-way interface with RF circuit analysis and simulation tools such as EESOFT. The results after analysis and simulation can be back-labeled to the schematic and PCB.

At the same time, using the design management function of Mentor software, design reuse, design derivation, and collaborative design can be easily realized. Greatly accelerate the design process of mixed circuits. Mobile phone boards are typical mixed circuit designs, and many large mobile phone design manufacturers use Mentor plus Angelen’s eesoft as a design platform.

59.What is Mentor’s product structure?

Mentor Graphics’ PCB tools include the WG (formerly veribest) series and the Enterprise (boardstation) series.

60.How does Mentor’s PCB design software support BGA, PGA, COB and other packages?

Mentor’s autoactive RE was developed from the acquired veribest and is the industry’s first gridless, arbitrary angle router. As we all know, for ball grid arrays and COB devices, gridless, arbitrary angle routers are the key to solving routing problems.

In the latest autoactive RE, new functions such as push vias, copper foil, and REROUTE have been added to make it more convenient to use. In addition, it supports high-speed routing, including signal routing with delay requirements and differential pair routing.

61.How does Mentor’s PCB design software handle differential lines?

After the Mentor software defines the differential pair properties, the two differential pairs can be routed together, strictly ensuring the differential pair line width, spacing and length difference. They can be automatically separated when encountering obstacles, and the via method can be selected when changing layers.

62.On a 12-layer PCB board, there are three power supply layers 2.2v, 3.3v, and 5v. The three power supplies are each on one layer. How should the ground wire be handled?

Generally speaking, it is better for signal quality to have three power supplies on three layers. Because it is unlikely that the signal will be split across the plane layer. Cross-splitting is a critical factor affecting signal quality, and simulation software generally ignores it.

For power layers and ground layers, they are equivalent for high-frequency signals. In practice, in addition to considering signal quality, power plane coupling (using adjacent ground planes to reduce the AC impedance of the power plane) and layer symmetry are all factors that need to be considered.

63.How to check whether the PCB meets the design process requirements when it leaves the factory?

Many PCB manufacturers have to undergo a powered network continuity test before the PCB processing is completed and shipped to ensure that all the connections are correct. At the same time, more and more manufacturers are also using x-ray testing to check some faults during etching or lamination.

For finished boards after patch processing, ICT testing is generally used, which requires adding ICT test points during PCB design. If there is a problem, a special X-ray inspection device can also be used to rule out whether the fault is caused by processing.

64.Is “mechanism protection” protection of the casing?

Yes. The casing should be as tight as possible, with less or no conductive materials, and grounded as much as possible.

65.Do you also need to consider the ESD problem of the chip itself when selecting the chip?

Whether it is a double-layer board or a multi-layer board, the ground area should be increased as much as possible. When selecting a chip, you should consider the ESD characteristics of the chip itself. These are generally mentioned in the chip description, and even the same chip from different manufacturers will have different performances.

Pay more attention when designing, consider it more comprehensively, and the performance of the circuit board will be guaranteed to a certain extent. But ESD problems may still occur, so the protection of the mechanism is also very important for ESD protection.

66.When making a PCB board, in order to reduce interference, should the ground wire be in a closed form?

When making a PCB board, generally speaking, the loop area should be reduced to reduce interference. When laying the ground wire, it should not be laid in a closed form, but it is better to lay it in a tree-like shape. In addition, the ground area should be increased as much as possible.

67.If the simulator uses one power supply and the PCB board uses one power supply, should the ground of these two power supplies be connected together?

If a separate power supply can be used, it is of course better, because it is not easy to cause interference between the power supplies, but most equipment has specific requirements. Since the simulator and the PCB board use two power supplies, I think they should not be grounded together.

68.A circuit is composed of several PCB boards. Should they share the ground?

A circuit is composed of several PCBs, and most of them require a common ground, because it is not practical to use several power supplies in one circuit. But if you have specific conditions, you can use different power supplies, and of course the interference will be less.

69.Design a handheld product with LCD and metal shell.

When testing ESD, it cannot pass the ICE-1000-4-2 test, CONTACT can only pass 1100V, and AIR can pass 6000V. When testing ESD coupling, it can only pass 3000V horizontally and 4000V vertically. The CPU main frequency is 33MHZ. Is there any way to pass the ESD test?

The handheld product has a metal shell, and the ESD problem must be more obvious. LCD may also have more adverse phenomena. If there is no way to change the existing metal material, it is recommended to add anti-electric material inside the mechanism, strengthen the PCB ground, and find a way to ground the LCD. Of course, how to operate depends on the specific situation.

70.When designing a system containing DSP and PLD, from which aspects should ESD be considered?

For general systems, the main consideration is the parts that are in direct contact with the human body, and appropriate protection should be provided in the circuit and mechanism.

As for how much impact ESD will have on the system, it depends on different situations. In a dry environment, the ESD phenomenon will be more serious, and the impact of ESD will be relatively obvious in more sensitive and delicate systems. Although the impact of ESD is sometimes not obvious in large systems, more attention should be paid during design to prevent it as much as possible.