Design a perfect PCB, pay attention to these details
Layout
10 rules for component layout:
- Follow the layout principle of “big first, small later, difficult first, easy later”, that is, important unit circuits and core components should be laid out first.
- The principle block diagram should be referred to in the layout, and the main components should be arranged according to the main signal flow of the single board.
- The arrangement of components should be convenient for debugging and maintenance, that is, large components should not be placed around small components, and there should be enough space around components and devices that need to be debugged.
- For the same structural circuit part, the “symmetrical” standard layout should be adopted as much as possible;
- Optimize the layout according to the standards of uniform distribution, balanced center of gravity, and beautiful layout;
- The same type of plug-in components should be placed in one direction in the X or Y direction. The same type of polar discrete components should also strive to be consistent in the X or Y direction to facilitate production and inspection.
- Heat-generating components should generally be evenly distributed to facilitate the heat dissipation of the single board and the whole machine. Temperature-sensitive devices other than temperature detection components should be kept away from components with high heat generation.
- The layout should meet the following requirements as much as possible: the total connection line should be as short as possible, and the key signal line should be the shortest; high voltage, high current signals should be completely separated from small current, low voltage weak signals; analog signals should be separated from digital signals; high frequency signals should be separated from low frequency signals; high frequency components should be spaced sufficiently.
- The layout of the decoupling capacitor should be as close to the power pin of the IC as possible, and the loop formed between it and the power supply and ground should be as short as possible.
- When laying out components, appropriate consideration should be given to placing devices using the same power supply together as much as possible to facilitate future power supply separation.
Wiring
(1) Wiring priority
Key signal line priority: key signals such as analog small signals, high-speed signals, clock signals and synchronization signals should be routed first
Density priority principle: start routing from the device with the most complex connection relationship on the single board. Start routing from the area with the densest connection on the single board
Note:
a. Try to provide dedicated wiring layers for key signals such as clock signals, high frequency signals, sensitive signals, and ensure their minimum loop area. If necessary, manual priority wiring, shielding and increased safety spacing should be adopted. Ensure signal quality.
b. The EMC environment between the power layer and the ground layer is poor, and signals that are sensitive to interference should be avoided.
c. Networks with impedance control requirements should be routed as far as possible according to the line length and line width requirements.
(2) Four specific routing methods
- Clock routing:
The clock line is one of the factors that has the greatest impact on EMC. Fewer vias should be drilled on the clock line, and routing should be avoided as much as possible in parallel with other signal lines. It should be kept away from general signal lines to avoid interference with signal lines. At the same time, the power supply part on the board should be avoided to prevent mutual interference between the power supply and the clock.
If there is a dedicated clock generation chip on the board, no routing should be done under it. Copper should be laid under it, and ground can be cut for it if necessary. For many chips with reference crystal oscillators, routing should not be done under these crystal oscillators. Copper should be laid to isolate them.
Picture - Right-angle routing:
Right-angle routing is generally a situation that is required to be avoided as much as possible in PCB routing, and it has almost become one of the standards for measuring the quality of routing. So how much impact will right-angle routing have on signal transmission? In principle, right-angle routing will change the line width of the transmission line, causing impedance discontinuity. In fact, not only right-angle routing, but also angled and sharp-angle routing may cause impedance changes.
The impact of right-angle routing on signals is mainly reflected in three aspects:
First, the corner can be equivalent to a capacitive load on the transmission line, slowing down the rise time;
Second, impedance discontinuity will cause signal reflection;
Third, EMI generated by the right-angle tip. - Differential routing:
See: Altium Designer — Differential routing and impedance matching
Differential signals are increasingly used in high-speed circuit design, and the most critical signals in the circuit often have to be designed with differential structures. Definition: In layman’s terms, the driver sends two equal and opposite signals, and the receiver determines the logic state “0” or “1” by comparing the difference between the two voltages. The pair of routing lines that carry differential signals is called differential routing.
Compared with ordinary single-ended signal routing, the most obvious advantages of differential signals are reflected in the following three aspects:
a. Strong anti-interference ability, because the coupling between the two differential routings is very good. When there is noise interference from the outside, it is almost coupled to the two lines at the same time, and the receiving end only cares about the difference between the two signals, so the common mode noise from the outside can be completely offset.
b. It can effectively suppress EMI. In the same way, because the polarity of the two signals is opposite, the electromagnetic fields they radiate to the outside can offset each other. The tighter the coupling, the less electromagnetic energy is released to the outside.
c. Accurate timing positioning. Because the switching change of the differential signal is located at the intersection of the two signals, unlike the ordinary single-ended signal, which relies on the high and low threshold voltages for judgment, it is less affected by the process and temperature, can reduce the timing error, and is also more suitable for circuits with low amplitude signals. The currently popular LVDS (low voltage differential signaling) refers to this small amplitude differential signal technology.
For PCB engineers, the most important thing is how to ensure that these advantages of differential routing can be fully utilized in actual routing. Perhaps anyone who has been in contact with Layout will understand the general requirements of differential routing, which is “equal length and equal distance”.
Equal length is to ensure that the two differential signals always maintain opposite polarity and reduce common mode components; equal distance is mainly to ensure that the differential impedance of the two is consistent and reduce reflection. “As close as possible” is sometimes also one of the requirements for differential routing. - Serpentine line:
Serpentine line is a type of routing method often used in Layout. Its main purpose is to adjust the delay and meet the system timing design requirements.
Designers must first have this understanding:
Serpentine line will damage the signal quality and change the transmission delay. Try to avoid using it when wiring. However, in actual design, in order to ensure that the signal has enough hold time, or to reduce the time offset between the same group of signals, it is often necessary to deliberately wrap the wire.
Note:
Differential signal lines that appear in pairs are generally routed in parallel, and as few holes as possible are punched. When holes must be punched, both lines should be punched together to achieve impedance matching.
A group of buses with the same properties should be routed side by side as much as possible and as equal in length as possible. The vias leading out from the SMD pads should be as far away from the pads as possible.
Picture
(3) Common rules for wiring - Direction control rules for routing:
That is, the routing directions of adjacent layers are orthogonal. Avoid routing different signal lines in the same direction on adjacent layers to reduce unnecessary crosstalk between layers;
When this situation is difficult to avoid due to board structure limitations (such as some backplanes), especially when the signal rate is high, you should consider using ground planes to isolate each wiring layer and using ground signal lines to isolate each signal line.
Picture - Open-loop inspection rules for routing:
Generally, wiring with one end floating (Dangling Line) is not allowed, mainly to avoid the “antenna effect” and reduce unnecessary interference radiation and reception, otherwise it may bring unpredictable results.
Picture - Impedance matching inspection rules:
The wiring width of the same network should be consistent. Changes in line width will cause uneven characteristic impedance of the line. When the transmission speed is high, reflection will occur. This situation should be avoided as much as possible in the design.
Under certain conditions, such as the similar structure of the connector lead wire and the BGA package lead wire, the change of line width may be unavoidable, and the effective length of the inconsistent part in the middle should be minimized. Picture - Trace length control rule:
That is, the short line rule. When designing, the wiring length should be as short as possible to reduce the interference problem caused by too long traces. In particular, for some important signal lines, such as clock lines, their oscillators must be placed very close to the device. For the case of driving multiple devices, the network topology structure should be determined according to the specific situation.
Picture - Chamfer rule:
Avoid sharp angles and right angles in PCB design, which will generate unnecessary radiation and poor process performance. Picture - Device decoupling rule: A. Add necessary decoupling capacitors on the printed board to filter out the interference signal on the power supply and make the power supply signal stable.
In multi-layer boards, the position of decoupling capacitors is generally not very high, but for double-layer boards, the layout of decoupling capacitors and the wiring method of the power supply will directly affect the stability of the entire system, and sometimes even the success or failure of the design.
B. In the design of double-layer boards, the current should generally be filtered by the filter capacitor before being used by the device. C. In the design of high-speed circuits, whether the decoupling capacitor can be used correctly is related to the stability of the entire board.
Picture - Device layout partition/layer rules:
A. It is mainly to prevent mutual interference between modules with different operating frequencies, and to shorten the wiring length of the high-frequency part as much as possible.
B. For mixed circuits, there is also a way to arrange analog and digital circuits on both sides of the printed circuit board, use different layers for wiring, and isolate them with the ground layer in the middle.
Picture - Ground loop rule:
The minimum loop rule, that is, the loop area formed by the signal line and its loop should be as small as possible. The smaller the loop area, the less external radiation and the less external interference.
Picture - Power and ground layer integrity rule:
For areas with dense vias, care should be taken to avoid the holes connecting to each other in the hollowed-out areas of the power supply and ground layer, forming a division of the plane layer, thereby destroying the integrity of the plane layer, and then causing the signal line to increase the loop area in the ground layer. Image - 3W rule: In order to reduce crosstalk between lines, the line spacing should be large enough. When the line center spacing is not less than 3 times the line width, 70% of the electric fields can be kept from interfering with each other, which is called the 3W rule. If you want to achieve 98% of the electric fields not interfering with each other, you can use a spacing of 10W. Image
- Shielding protection:
Corresponding to the ground loop rule, it is actually also to minimize the loop area of the signal, which is more common in some more important signals, such as clock signals and synchronization signals;
For some particularly important and high-frequency signals, you should consider using a copper-coaxial cable shielding structure design, that is, to isolate the wires up and down, left and right with ground wires, and also consider how to effectively combine the shielding ground with the actual ground plane.
Image - Routing termination network rules:
In high-speed digital circuits, when the delay time of PCB wiring is greater than 1/4 of the signal rise time (or fall time), the wiring can be regarded as a transmission line. In order to ensure that the input and output impedances of the signal are correctly matched with the impedance of the transmission line, various matching methods can be used. The selected matching method is related to the connection mode of the network and the topological structure of the wiring.
A. For point-to-point (one output corresponds to one input) connection, you can choose the start-end series matching or the terminal parallel matching. The former has a simple structure and low cost, but a large delay. The latter has a good matching effect, but a complex structure and a high cost.
B. For point-to-multipoint (one output corresponds to multiple outputs) connection, when the network topology is a daisy chain, the terminal parallel matching should be selected.
When the network is a star structure, the point-to-point structure can be referred to. Star and daisy chain are two basic topological structures, and other structures can be regarded as deformations of the basic structure. Some flexible measures can be taken for matching.
In actual operation, factors such as cost, power consumption and performance should be taken into account. Generally, perfect matching is not pursued, as long as the interference such as reflection caused by mismatch is limited to an acceptable range.
Picture - Routing closed loop inspection rules:
Prevent signal lines from forming self-loops between different layers. Such problems are prone to occur in multi-layer board design, and self-loops will cause radiation interference.
Picture - Routing branch length control rules:
Try to control the length of the branch. The general requirement is Tdelay<=Trise/20.
Picture - Routing resonance rules:
Mainly for high-frequency signal design, that is, the wiring length must not be an integer multiple of its wavelength to avoid resonance.
Picture - Isolated copper area control rules:
The emergence of isolated copper areas will bring some unpredictable problems. Therefore, connecting isolated copper areas with other signals will help improve signal quality. Usually, isolated copper areas are grounded or deleted.
In actual production, PCB manufacturers add some copper foil to the vacant parts of some boards. This is mainly to facilitate the processing of printed boards, and it also has a certain effect on preventing the warping of printed boards.
Picture - Overlapping power and ground layer rules:
Different power layers should avoid overlapping in space. It is mainly to reduce the interference between different power supplies, especially between some power supplies with large voltage differences. The overlapping problem of power planes must be avoided. If it is difficult to avoid, consider using a ground layer in the middle.
Picture - 20H rule:
Since the electric field between the power layer and the ground layer is changing, electromagnetic interference will be radiated outward at the edge of the board. It is called edge effect.
The solution is to shrink the power layer so that the electric field is only conducted within the range of the ground layer. Taking one H (the thickness of the medium between the power supply and the ground) as a unit, if it shrinks by 20H, 70% of the electric field can be confined to the edge of the ground layer; if it shrinks by 100H, 98% of the electric field can be confined.
Image
(4) Others For single-layer and double-layer boards, the power lines should be as thick and short as possible. The width requirements of the power line and the ground line can be calculated based on the maximum current of 1A corresponding to the line width of 1mm. The loop formed by the power supply and the ground should be as small as possible.
Image
In order to prevent the coupled noise on the power line from directly entering the load device when the power line is long, the power supply should be decoupled before entering each device. And in order to prevent them from interfering with each other, the power supply of each load should be decoupled independently, and filtered before entering the load.
Image The grounding should be kept good during wiring. As shown below.
