EMI control technology in digital circuit PCB design
1 Generation and suppression principle of EMI
EMI is generated by the electromagnetic interference source transferring energy to the sensitive system through the coupling path. It includes three basic forms: conduction through wires or common ground wires, radiation through space, or coupling through near fields. The harm of EMI is manifested in reducing the quality of transmission signals, interfering with or even destroying circuits or equipment, so that the equipment cannot meet the technical indicators specified in the electromagnetic compatibility standards.
In order to suppress EMI, the EMI design of digital circuits should be carried out according to the following principles:
- According to the relevant EMC/EMI technical specifications, decompose the indicators into single board circuits and control them in stages.
- Control from the three elements of EMI, namely interference sources, energy coupling paths, and sensitive systems, so that the circuit has a flat frequency response and ensures normal and stable operation of the circuit.
- Start with the front-end design of the equipment, pay attention to EMC/EMI design, and reduce design costs.

2 EMI control technology for digital circuit PCB
When dealing with various forms of EMI, specific problems must be analyzed specifically. In the PCB design of digital circuits, EMI control can be carried out from the following aspects.
2.1 Device selection
When designing EMI, the speed of the selected device should be considered first. For any circuit, if the device with a rise time of 5ns is replaced by a device with a rise time of 2.5ns, the EMI will increase by about 4 times. The radiation intensity of EMI is proportional to the square of the frequency. The highest EMI frequency (fknee) is also called the EMI emission bandwidth, which is a function of the signal rise time rather than the signal frequency:
fknee = 0.35/Tr (where Tr is the signal rise time of the device)
The frequency range of this radiated EMI is from 30MHz to several GHz. In this frequency band, the wavelength is very short, and even very short wiring on the circuit board may become a transmitting antenna. When EMI is high, the circuit is prone to lose normal function. Therefore, in device selection, low-speed chips should be used as much as possible, and appropriate drive/receive circuits should be adopted under the premise of ensuring circuit performance requirements. In addition, since the lead pins of the device have parasitic inductance and parasitic capacitance, the impact of the device packaging form on the signal cannot be ignored in high-speed design, because it is also an important factor in generating EMI radiation. Generally, the parasitic parameters of SMD devices are smaller than those of plug-in devices, and the parasitic parameters of BGA packages are smaller than those of QFP packages.
2.2 Selection of connectors and definition of signal terminals
Connectors are the key link in high-speed signal transmission and the weak link that is prone to EMI. In the design of connector terminals, more ground pins can be arranged to reduce the distance between the signal and the ground, reduce the effective signal loop area that generates radiation in the connector, and provide a low-impedance return path. If necessary, consider isolating some key signals with ground pins.
2.3 Stacking design
Under the premise of cost permission, increasing the number of ground layers and placing the signal layer close to the ground plane layer can reduce EMI radiation. For high-speed PCBs, the power layer and the ground layer are closely coupled to reduce the power supply impedance, thereby reducing EMI.
2.4 Layout
Reasonable layout according to the direction of signal current flow can reduce interference between signals. Reasonable layout is the key to controlling EMI. The basic principles of layout are:
- Analog signals are susceptible to interference from digital signals, and analog circuits should be separated from digital circuits;
- Clock lines are the main source of interference and radiation, so they should be kept away from sensitive circuits and the clock traces should be kept as short as possible;
- High current and high power consumption circuits should be avoided from being arranged in the center area of the board as much as possible, and the effects of heat dissipation and radiation should be considered;
- Connectors should be arranged on one side of the board as much as possible, and away from high-frequency circuits;
- Input/output circuits are close to corresponding connectors, and decoupling capacitors are close to corresponding power pins;
- Fully consider the feasibility of layout for power segmentation, and multi-power devices should be placed across the boundary of the power segmentation area to effectively reduce the impact of plane segmentation on EMI;
- The return plane (path) is not divided.
2.5 Wiring
- Impedance control: High-speed signal lines will show the characteristics of transmission lines, and impedance control is required to avoid signal reflection, overshoot and ringing, and reduce EMI radiation.
- Classify the signals, and separate the interference source from the sensitive system as much as possible according to the EMI radiation intensity and sensitivity of different signals (analog signals, clock signals, I/O signals, buses, power supplies, etc.) to reduce coupling.
- Strictly control the routing length, number of vias, cross-segment area, termination, wiring layer, return path, etc. of clock signals (especially high-speed clock signals).
- The signal loop, that is, the loop formed by the signal outflow to the signal inflow, is the key to EMI control in PCB design and must be controlled during wiring. To understand the flow direction of each key signal, the key signal should be routed close to the return path to ensure that its loop area is minimized.
For low-frequency signals, the current should flow through the path with the least resistance; for high-frequency signals, the high-frequency current should flow through the path with the least inductance, not the path with the least resistance (see Figure 1). For differential mode radiation, the EMI radiation intensity (E) is proportional to the current, the area of the current loop, and the square of the frequency. (Where I is the current, A is the loop area, f is the frequency, r is the distance to the center of the loop, and k is a constant.)
Therefore, when the minimum inductance return path is just below the signal conductor, the current loop area can be reduced, thereby reducing the EMI radiation energy.
- Key signals must not cross the split area.
- High-speed differential signal routing should be tightly coupled as much as possible.
- Ensure that the stripline, microstrip line and its reference plane meet the requirements.
- The lead wires of the decoupling capacitor should be short and wide.
- All signal routing should be as far away from the edge of the board as possible.
- For multi-point connection networks, choose a suitable topology to reduce signal reflection and reduce EMI radiation.
2.6 Split processing of power plane
- Split power layer
When there are one or more sub-power supplies on a main power plane, the continuity of each power area and sufficient copper foil width must be ensured. The split line does not need to be too wide, generally 20 to 50 mil line width is sufficient to reduce gap radiation.
- Ground plane segmentation
The ground plane layer should maintain integrity and avoid segmentation. If segmentation is necessary, distinguish between digital ground, analog ground and noise ground, and connect to the external ground through a common ground point at the exit.
In order to reduce the edge radiation of the power supply, the power/ground plane should follow the 20H design principle, that is, the ground plane size is 20H larger than the power plane size (see Figure 2), so that the edge field radiation intensity can be reduced by 70%.

3 Other EMI control methods
3.1 Power system design
- Design a low-impedance power system to ensure that the impedance of the power distribution system in the frequency range below fknee is lower than the target impedance.
- Use filters to control conducted interference.
- Power decoupling. In EMI design, providing reasonable decoupling capacitors can make the chip work reliably, reduce high-frequency noise in the power supply, and reduce EMI. Due to the influence of wire inductance and other parasitic parameters, the power supply and its power supply wires respond slowly, which will make the instantaneous current required by the driver in the high-speed circuit insufficient. Reasonable design of bypass or decoupling capacitors and distributed capacitors of the power layer can quickly provide current to the device by using the energy storage effect of the capacitor before the power supply responds. Correct capacitor decoupling can provide a low-impedance power path, which is the key to reducing common-mode EMI.
3.2 Grounding
Grounding design is the key to reducing EMI of the entire board.
- Determine whether to use single-point grounding, multi-point grounding or mixed grounding.
- Digital ground, analog ground and noise ground should be separated, and a suitable common ground point should be determined.
- If there is no ground layer in the double-sided board design, it is important to reasonably design the ground grid, and the ground width should be guaranteed to be > power line width > signal line width. It is also possible to use a large-area grounding method, but it should be noted that the continuity of the large area ground on the same layer should be good.
- For multi-layer board design, ensure that there is a ground plane layer to reduce the common ground impedance.
3.3 Series damping resistor
Under the premise that the circuit timing requirements allow, the basic technology for suppressing interference sources is to connect a small resistance in series at the output end of the key signal, usually a 22~33Ω resistor. These output terminals connected in series with small resistors can slow down the rise/fall time and make the overshoot and undershoot signals smoother, thereby reducing the high-frequency harmonic amplitude of the output waveform, achieving the purpose of effectively suppressing EMI.
3.4 Shielding
- EMI shielding materials or shielding nets can be used for key components.
- Shielding of key signals can be designed as strip lines or isolated by ground lines on both sides of the key signals.
3.5 Spread spectrum
The spread spectrum (spread spectrum) method is a new and effective method to reduce EMI. Spread spectrum modulates the signal and expands the signal energy to a wider frequency range. In fact, this method is a controlled modulation of the clock signal, which does not significantly increase the jitter of the clock signal. Practical applications have proved that spread spectrum technology is effective and can reduce radiation by 7 to 20dB.
3.6 EMI Analysis and Test
- Simulation Analysis
After completing the PCB wiring, you can use EM I simulation software and expert system to perform simulation analysis to simulate the EMC/EMI environment to evaluate whether the product meets the requirements of relevant electromagnetic compatibility standards.
- Scanning Test
Use an electromagnetic radiation scanner to scan the machine disk after assembly and power on to obtain the electromagnetic field distribution diagram in the PCB (as shown in Figure 3, the red, green, and bluish-white areas in the figure represent the electromagnetic radiation energy from low to high), and improve the PCB design based on the test results.
4 Summary
With the continuous development and application of new high-speed chips, the signal frequency is getting higher and higher, and the PCB boards that carry them may become smaller and smaller. PCB design will face more severe EMI challenges. Only by continuous exploration and innovation can the EMC/EMI design of PCB boards be successful.






